UPC1862GS NEC, UPC1862GS Datasheet
UPC1862GS
Manufacturer Part Number
UPC1862GS
Description
BURST LOCK CLOCK GENERATOR
Manufacturer
NEC
Datasheet
1.UPC1862GS.pdf
(32 pages)
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Document No. S11431EJ3V0DS00 (3rd edition)
Date Published December 1997 N CP(K)
Printed in Japan
for the processing of digital video signals as in extended definition television (EDTV) systems.
FEATURES
ORDERING INFORMATION
PC1862GS
The PC1862 is an LSI incorporating a PLL circuit to generate nf
• VCO is incorporated.
• Horizontal and vertical sync separation circuits are incorporated (with output pins).
• Horizontal and vertical sync output pulses (TTL level)
• ACC amplifier and killer detector circuits are incorporated.
• 1/4 and 1/8 (1/2
• f
• Applicable to both NTSC and PAL systems.
• Possible to input burst gate pulse from external
SC
Part number
phase control circuits is incorporated.
1/4) frequency dividers are incorporated.
The information in this document is subject to change without notice.
BURST LOCK CLOCK GENERATOR
BIPOLAR ANALOG INTEGRATED CIRCUIT
The mark
36-pin plastic shrink SOP (300 mil)
DATA SHEET
shows major revised points.
Package
SC
clocks (f
SC
: color subcarrier frequency), ideal
PC1862
©
1991, 1996
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