W83194R-67B Winbond, W83194R-67B Datasheet - Page 4

• Manufacturer Part Number: W83194R-67B
• Description: 100MHZ 3-DIMM CLOCK FOR VIA MVP4
• Manufacturer: Winbond

5.3 I
*SDATA
*SDCLK
5.4 Fixed Frequency Outputs
REF0 / *PCI_STOP#
REF1 / *FS2
24MHz / *FS1
48MHz / *FS0
5.5 Power Pins
Vddq1
VddL1
Vddq2
Vddq3
Vddq4
Vss
2
C Control Interface
S Y M B O L
S Y M B O L
S Y M B O L
3,9,16,22,33,40,44 Circuit Ground.
PIN
PIN
19, 30, 36
23
24
48
25
26
2
6, 14
PIN
47
27
1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
- 4 -
Power supply for Ref [0:1] , Xin and Xout crystal.
Power supply for CPU clock outputs, either 2.5V or
3.3V.
Power supply for PCICLK_F, PCICLK[1:4], 3.3V.
Power supply for SDRAM_F,SDRAM[0:11], and PLL
core, nominal 3.3V.
Power for 24 & 48MHz output buffers and PLL core.
Serial data of I
pull-up resistor.
Serial clock of I
internal pull-up resistor.
14.318MHz reference clock. This REF output is the
stronger buffer for ISA bus loads.
Halt PCICLK(0:4) clocks at logic 0 level, when input
low (In mobile mode. MODE=0)
14.318MHz reference clock.
Latched input for FS2 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
24MHz output clock.
Latched input for FS1 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
48MHz output for USB during normal operation.
Latched input for FS0 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
2
C 2-wire control interface with internal
2
C 2-wire control interface with
Publication Release Date: Dec.. 1999
F U N C T I O N
F U N C T I O N
F U N C T I O N
W83194R-67B
PRELIMINARY
Revision 0.50