M48T37 ST Microelectronics, M48T37 Datasheet - Page 8

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M48T37

Manufacturer Part Number
M48T37
Description
3.3V-5V 256 Kbit 32Kb x8 TIMEKEEPER SRAM
Manufacturer
ST Microelectronics
Datasheet

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M48T37Y, M48T37V
Figure 7. Write Enable Controlled, Write AC Waveform
WRITE MODE
The M48T37Y/37V is in the Write Mode whenever
W and E are low. The start of a write is referenced
from the latter occurring falling edge of W or E. A
write is terminated by the earlier rising edge of W
or E. The addresses must be held valid throughout
the cycle. E or W must return high for a minimum
of t
able prior to the initiation of another read or write
cycle. Data-in must be valid t
of write and remain valid for t
should be kept high during write cycles to avoid
bus contention; although, if the output bus has
been activated by a low on E and G a low on W will
disable the outputs t
DATA RETENTION MODE
With valid V
ates as a conventional BYTEWIDE static RAM.
Should the Supply Voltage decay, the RAM will
automatically power-fail deselect, write protecting
itself when V
(min) window. All outputs become high imped-
ance, and all inputs are treated as ”don’t care”.
8/20
EHAX
from Chip Enable or t
A0-A14
E
W
DQ0-DQ7
CC
CC
applied, the M48T37Y/37V oper-
falls within the V
WLQZ
after W falls.
DVWH
WHAX
WHDX
PFD
tAVEL
tAVWL
prior to the end
from Write En-
afterward. G
(max), V
tWLQZ
PFD
tAVWH
tWLWH
tAVAV
VALID
Note: A power failure during a write cycle may cor-
rupt data at the currently addressed location, but
does not jeopardize the rest of the RAM’s content.
At voltages below V
sured the memory will be in a write protected state,
provided the V
The M48T37Y/37V may respond to transient noise
spikes on V
during the time the device is sampling V
fore, decoupling of the power supply lines is rec-
ommended.
When V
switches power to the internal battery which pre-
serves data and powers the clock. The internal
button cell will maintain data in the M48T37Y/37V
for an accumulated period of at least 7 years at
room temperature when V
system power returns and V
the battery is disconnected, and the power supply
is switched to external V
tion can resume t
(max).
For more information on Battery Storage Life refer
to the Application Note AN1012.
tDVWH
CC
DATA INPUT
CC
tWHDX
drops below V
CC
that reach into the deselect window
fall time is not less than t
REC
PFD
(min), the user can be as-
after V
CC
tWHQX
CC
SO
. Normal RAM opera-
tWHAX
CC
is less than V
, the control circuit
CC
rises above V
reaches V
AI00926
CC
. There-
F
SO
.
. As
PFD
SO
,

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