SAA7130 Philips Semiconductors, SAA7130 Datasheet - Page 10

• Manufacturer Part Number: SAA7130
• Description: PCI video broadcast decoder
• Manufacturer: Philips Semiconductors

Philips Semiconductors
6.2
Table 2 Power supply pins
Table 3 PCI interface pins; note 1
2002 Apr 23
V
V
V
V
PCI_CLK
PCI_RST#
AD31 to AD0
CBE3# to
CBE0#
PAR
FRAME#
TRDY#
IRDY#
STOP#
IDSEL
DEVSEL#
REQ#
GNT#
SSA
DDA
SSD
DDD
PCI video broadcast decoder
SYMBOL
SYMBOL
Pins grouped by function
1, 19, 38, 54,
97, 108, 113
41 to 44 and
20, 39, 55,
64, 74, 93
12, 24, 33
14 to 18,
21 to 23,
34 to 37,
and 119
and 115
and 128
46 to 53
95, 110
4 to 11,
and 92
and 45
65, 73
PIN
PIN
127
40
32
25
27
26
29
13
28
3
2
AG
AS
VG
VS
PI
PI
PIO and
T/S
PIO and
T/S
PIO and
T/S
PIO and
S/T/S
PIO and
S/T/S
PIO and
S/T/S
PIO and
S/T/S
PI
PIO and
S/T/S
PO
PI
TYPE
TYPE
analog ground for integrated analog signal processing
analog supply voltage for integrated analog signal processing
digital ground for digital circuit, core and I/Os
digital supply voltage for digital circuit, core and I/Os
PCI clock input: reference for all bus transactions, up to 33.33 MHz
PCI reset input: will 3-state all PCI pins (active LOW)
multiplexed address and data input or output: bi-directional, 3-state
command code input or output: indicates type of requested transaction and
byte enable, for byte aligned transactions (active LOW)
parity input or output: driven by the data source, even parity over all pins AD
and CBE#
frame input or output: driven by the current bus master (owner), to indicate
the beginning and duration of a bus transaction (active LOW)
target ready input or output: driven by the addressed target, to indicate
readiness for requested transaction (active LOW)
initiator ready input or output: driven by the initiator, to indicate readiness to
continue transaction (active LOW)
stop input or output: target is requesting the master to stop the current
transaction (active LOW)
initialization device select input: this input is used to select the SAA7130HL
during configuration read and write transactions
device select input or output: driven by the target device, to acknowledge
address decoding (active LOW)
PCI request output: the SAA7130HL requests master access to PCI-bus
(active LOW)
PCI grant input: the SAA7130HL is granted to master access PCI-bus
(active LOW)
10
DESCRIPTION
DESCRIPTION
SAA7130HL
Product specification