SAA7130 Philips Semiconductors, SAA7130 Datasheet - Page 37

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SAA7130

Manufacturer Part Number
SAA7130
Description
PCI video broadcast decoder
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
2002 Apr 23
t
t
t
t
t
t
t
I
f
V
V
V
Analog video inputs
I
I
V
C
9-
B
G
LE
LE
S/N
ENOB
val
on
off
su
h
rst(CLK)
rst(off)
2
bit
NPUTS
clamp
dif
SYMBOL
IL
IH
OL
i(p-p)
cs
C-bus interface, compatible to 3.3 and 5 V signalling (pins SDA and SCL)
i
PCI video broadcast decoder
dif
BIT ANALOG
DC(d)
DC(i)
(
PINS
CV0
-
TO
CLK to signal valid delay
float-to-active delay
active-to-float delay
input set-up time to CLK
input hold time from CLK
reset active time after CLK
stable
reset active to output float
delay
bit frequency rate
LOW-level input voltage
HIGH-level input voltage
LOW-level output voltage
clamping current
input voltage
(peak-to-peak value)
input capacitance
channel crosstalk
analog bandwidth
differential phase
differential gain
DC differential linearity error
DC integral linearity error
signal-to-noise ratio
effective number of bits
-
DIGITAL CONVERTERS
TO
CV4)
PARAMETER
see Fig.17; note 4
see Fig.17; note 5
see Fig.17; note 5
see Fig.17; note 4
see Fig.17
note 6
notes 5, 6 and 7
note 8
note 8
I
DC input voltage V
note 9
f
at 3 dB; ADC only;
note 10
amplifier plus anti-alias
filter bypassed
amplifier plus anti-alias
filter bypassed
f
bypassed; AGC = 0 dB
f
bypassed; AGC = 0 dB
o(sink)
i
i
i
< 5 MHz
= 4 MHz; anti-alias filter
= 4 MHz; anti-alias filter
bused signals
point-to-point signals
bused signals
point-to-point signals
CONDITIONS
= 3 mA
37
I
= 0.9 V
2
2
2
7
10 (12)
0
100
0
0.7V
0.375
0.5
MIN.
DD(I2C)
0.75
7
2
2
1.4
2
50
8
TYP.
8
11
12
28
40
400
+0.3V
V
0.4
1.07
10
50
DD(I2C)
SAA7130HL
Product specification
MAX.
DD(I2C)
+ 0.5 V
ns
ns
ns
ns
ns
ns
ns
ns
kbits/s
V
V
V
pF
dB
MHz
deg
%
LSB
LSB
dB
bit
UNIT
s
A

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