SAA7130 Philips Semiconductors, SAA7130 Datasheet - Page 34

• Manufacturer Part Number: SAA7130
• Description: PCI video broadcast decoder
• Manufacturer: Philips Semiconductors

Philips Semiconductors
8
The SAA7130HL has built-in logic and five dedicated pins
to support boundary scan testing which allows board
testing without special hardware (nails). The SAA7130HL
follows the “IEEE Std. 1149.1 - Standard Test Access Port
and Boundary - Scan Architecture” set by the Joint Test
Action Group (JTAG) chaired by Philips.
The 5 special pins are: Test Mode Select (TMS), Test
Clock (TCK), Test Reset (TRST), Test Data Input (TDI)
and Test Data Output (TDO).
The Boundary Scan Test (BST) functions BYPASS,
EXTEST, SAMPLE, CLAMP and IDCODE are all
supported (see Table 15). Details about the JTAG
BST-test can be found in the specification “ IEEE Std.
1149.1” . A file containing the detailed Boundary Scan
Description Language (BSDL) description of the
SAA7130HL is available on request.
8.1
The Test Access Port (TAP) controller of an IC should be
in the reset state (TEST_LOGIC_RESET) when the IC is
in the functional mode. This reset state also forces the
instruction register into a functional instruction such as
IDCODE or BYPASS.
Table 15 BST instructions supported by the SAA7130HL
2002 Apr 23
handbook, full pagewidth
INSTRUCTION
PCI video broadcast decoder
BOUNDARY SCAN TEST
SAMPLE
BYPASS
EXTEST
IDCODE
CLAMP
Initialization of boundary scan circuit
This mandatory instruction provides a minimum length serial path (1 bit) between pins TDI and TDO
when no test operation of the component is required.
This mandatory instruction allows testing of off-chip circuitry and board level interconnections.
This mandatory instruction can be used to take a sample of the inputs during normal operation of
the component. It can also be used to preload data values into the latched outputs of the boundary
scan register.
This optional instruction is useful for testing when not all ICs have BST. This instruction addresses
the bypass register while the boundary scan register is in external test mode.
This optional instruction will provide information on the components manufacturer, part number and
version number.
TDI
31
MSB
version
0001
code
4-bit
28 27
0111000100110000
Fig.16 32 bits of identification code.
16-bit part number
34
12 11
DESCRIPTION
To solve the power-up reset, the standard specifies that
the TAP controller will be forced asynchronously to the
TEST_LOGIC_RESET state by setting pin TRST to LOW
level.
8.2
When the IDCODE instruction is loaded into the BST
instruction register, the identification register will be
connected internally between pins TDI and TDO of the IC.
The identification register will load a component specific
code during the CAPTURE_DATA_REGISTER state of
the TAP controller and this code can subsequently be
shifted out. At board level, this code can be used to verify
component manufacturer, type and version number. The
device identification register contains 32 bits, numbered
31 to 0, where bit 31 is the most significant bit (nearest to
TDI) and bit 0 is the least significant bit (nearest to TDO)
(see Fig.16).
A device identification register is specified in “IEEE Std.
1149.1b-1994” . It is a 32-bit register which contains fields
for the specification of the IC manufacturer, the IC part
number and the IC version number. Its biggest advantage
is the possibility to check for the correct ICs mounted after
production and determination of the version number of ICs
during field service.
11-bit manufacturer
Device identification codes
00000010101
identification
mandatory
1
LSB
1
0
MHC175
TDO
SAA7130HL
Product specification