SAA7391H Philips Semiconductors, SAA7391H Datasheet - Page 53

• Manufacturer Part Number: SAA7391H
• Description: ATAPI CD-R block encoder/decoder
• Manufacturer: Philips Semiconductors

Philips Semiconductors
7.5.11
The host interface in generic mode will support two types
of DMA transfer to the NCR device, namely:
Both of these modes are 8 bit DMA transfers. During data
transfers the microcontroller can suspend the DMA
transfer (via HICONF1 register ‘dmaen’ bit 7) under the
following conditions:
7.5.13
In this mode the DMA data is available on the DMA bus when both, DBRD or DBWR and DMACK are true. DMACK
remains asserted throughout the transfer while DBRD toggles for each transfer as shown in Fig.6. To configure the host
interface the DMA mode and DMA bits (DTCTR bits 6 and 5) should be set to logic 1.
1997 Aug 01
handbook, full pagewidth
Normal DMA mode
Burst DMA mode.
An Interrupt received
An abort received
A register read required.
ATAPI CD-R block encoder/decoder
DMA
B
DMARQ
DMACK
URST
DBRD/
DBWR
TRANSFERS IN GENERIC MODE
DMA
MODE USING MULTIPLEXED BUS CONFIGURATION
Fig.5 Generic interface normal DMA mode.
53
7.5.12
In this mode the host Interface transfers data in single
bytes. This DMA mode is configured by setting ‘dmamode’
(DTCTR register bit 6) to zero, and DMA (DTCTR register
bit 5) to one. Data flow direction and byte counts are
configured the same as ATAPI DMA modes of data
transfer, but with command information being received via
the NCR SCSI controller registers external to the
SAA7391 operation. The data transfer takes place as long
as the DMA request signal DMARQ is true. The DMACK
signal is toggled by the host Interface for each byte
transferred as shown in Fig.5.
N
ORMAL
DMA
MODE
Objective specification
SAA7391
MGK514