S29GL256N SPANSION [SPANSION], S29GL256N Datasheet
S29GL256N
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S29GL256N Summary of contents
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... May be programmed and locked at the factory or by the customer Flexible sector architecture — S29GL512N: Five hundred twelve 64 Kword (128 Kbyte) sectors — S29GL256N: Two hundred fifty-six 64 Kword (128 Kbyte) sectors — S29GL128N: One hundred twenty-eight 64 Kword (128 Kbyte) sectors Compatibility with JEDEC standards — ...
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... BYTE# input. The device can be programmed either in the host system or in standard EPROM programmers. Access times as fast (S29GL128N, S29GL256N (S29GL512N) are available. Note that each access time has a specific operating voltage range (V ...
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The hardware RESET# pin terminates any operation in progress and resets the device, after which it is then ready for a new operation. The RESET# pin may be tied to the system reset ...
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... Volatile Sector Protection Command Set ................................................... 71 SecSi Sector Entry Command .......................................................................... 71 SecSi Sector Exit Command ........................................................................... 72 Command Definitions ........................................................................................73 Table 12. S29GL512N, S29GL256N, S29GL128N Command Defini- tions, x16 .........................................................................73 Table 13. S29GL512N, S29GL256N, S29GL128N Command Defini- tions, x8 ...........................................................................76 Write Operation Status ................................................................................... 78 DQ7: Data# Polling ........................................................................................... 78 Figure 5. Data# Polling Algorithm ........................................ 80 RY/BY#: Ready/Busy# .......................................................................................80 DQ6: Toggle Bit I ...
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... Hardware Reset (RESET#) .............................................................................. 92 Figure 13. Reset Timings..................................................... 92 Erase and Program Operations–S29GL512N Only ...................................93 Erase and Program Operations–S29GL256N Only ................................. 94 Erase and Program Operations–S29GL128N Only ...................................95 Figure 14. Program Operation Timings .................................. 96 Figure 15. Accelerated Program Timing Diagram .................... 96 Figure 16. Chip/Sector Erase Operation Timings ..................... 97 Figure 17 ...
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... S29GLxxxN MirrorBitTM Flash Family S29GL512N 10 11 100 110 100 110 S29GL256N 100 90 100 S29GL128N 100 90 100 27631A4 May 13, 2004 ...
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Block Diagram RY/BY RESET# WE# State WP#/ACC Control BYTE# Command Register CE# OE# V Detector CC A **–A0 Max ** A GL512N = A24, A GL256N = ...
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... 56-Pin Standard TSOP S29GLxxxN MirrorBitTM Flash Family NC for S29GL256N 56 A24 55 and S29GL128N NC 54 A16 53 BYTE DQ15/A-1 DQ7 50 DQ14 49 DQ6 48 DQ13 47 DQ5 ...
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... NC NC Note: 1. Ball S29GL128N 2. Ball S29GL256N and S29GL128N Special Package Handling Instructions Special handling is required for Flash Memory products in molded packages (TSOP, BGA). The package and/or data integrity may be compromised if the pack- age body is exposed to temperatures above 150°C for prolonged periods of time. ...
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PIN DESCRIPTION A24–A0 A23–A0 A22–A0 DQ14–DQ0 DQ15/A-1 CE# OE# WE# WP#/ACC RESET# BYTE# RY/BY ...
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... LOGIC SYMBOL May 13, 2004 27631A4 S29GL512N A24– DQ15–DQ0 CE# (A-1) OE# WE# WP#/ACC RESET# V RY/BY# IO BYTE# S29GL256N A23– DQ15–DQ0 CE# (A-1) OE# WE# WP#/ACC RESET# V RY/BY# IO BYTE# S29GL128N A22– DQ15–DQ0 CE# (A-1) ...
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Ordering Information (512 Mb) The ordering part number is formed by a valid combination of the following: S29GL512N DEVICE NUMBER/DESCRIPTION S29GL512N 3.0 Volt-only, 512 Megabit ( 16-Bit/ 8-Bit) Page-Mode Flash Memory Manufactured on ...
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... Manufactured on 110 nm MirrorBit S29GL512N Valid Combinations 256 Mb Speed (ns) 80, 90 S29GL256N 90, 10 Notes: 1. Type 0 is standard. Specify other options as required. 2. TSOP package marking omits packing type designator from ordering part number. 3. BGA package marking omits leading “S29” and packing type designator from ordering part number. ...
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Ordering Information (128 Mb) The ordering part number is formed by a valid combination of the following: S29GL128N DEVICE NUMBER/DESCRIPTION S29GL128N 3.0 Volt-only, 512 Megabit ( 16-Bit/ 8-Bit) Page-Mode Flash Memory Manufactured on ...
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Device Bus Operations This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory ...
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V device. For example I/O driving and receiving signals to and from other 1 devices on the same data bus. Requirements for Reading Array Data To read array data from ...
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Refer to the DC Characteristics table for the active current specification for the write mode. The AC Characteristics section contains timing specification tables and timing diagrams for write operations. Write Buffer Write Buffer ...
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Standard address access timings provide new data when addresses are changed. While in sleep mode, output data is latched and always available to the system. Refer to the “DC Characteristics” section on page 86 for the automatic sleep ...
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Table 2. Sector Address Table–S29GL512N (Continued) Sector A24–A16 SA14 SA15 SA16 SA17 SA18 ...
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Table 2. Sector Address Table–S29GL512N (Continued) Sector A24–A16 SA49 SA50 SA51 SA52 SA53 SA54 0 ...
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Table 2. Sector Address Table–S29GL512N (Continued) Sector A24–A16 SA84 SA85 SA86 SA87 SA88 ...
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Table 2. Sector Address Table–S29GL512N (Continued) Sector A24–A16 SA119 SA120 SA121 SA122 SA123 SA124 0 ...
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Table 2. Sector Address Table–S29GL512N (Continued) Sector A24–A16 SA154 SA155 SA156 SA157 SA158 ...
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Table 2. Sector Address Table–S29GL512N (Continued) Sector A24–A16 SA189 SA190 SA191 SA192 SA193 SA194 0 ...
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Table 2. Sector Address Table–S29GL512N (Continued) Sector A24–A16 SA224 SA225 SA226 SA227 SA228 ...
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Table 2. Sector Address Table–S29GL512N (Continued) Sector A24–A16 SA259 SA260 SA261 SA262 SA263 SA264 1 ...
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Table 2. Sector Address Table–S29GL512N (Continued) Sector A24–A16 SA294 SA295 SA296 SA297 SA298 ...
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Table 2. Sector Address Table–S29GL512N (Continued) Sector A24–A16 SA329 SA330 SA331 SA332 SA333 SA334 1 ...
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Table 2. Sector Address Table–S29GL512N (Continued) Sector A24–A16 SA364 SA365 SA366 SA367 SA368 ...
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Table 2. Sector Address Table–S29GL512N (Continued) Sector A24–A16 SA399 SA400 SA401 SA402 SA403 SA404 1 ...
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Table 2. Sector Address Table–S29GL512N (Continued) Sector A24–A16 SA434 SA435 SA436 SA437 SA438 ...
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Table 2. Sector Address Table–S29GL512N (Continued) Sector A24–A16 SA469 SA470 SA471 SA472 SA473 SA474 1 ...
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... SA507 SA508 SA509 SA510 SA511 Table 3. Sector Address Table–S29GL256N Sector A23–A16 SA0 SA1 SA2 SA3 SA4 SA5 ...
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... Table 3. Sector Address Table–S29GL256N (Continued) Sector A23–A16 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 SA30 SA31 SA32 ...
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... Table 3. Sector Address Table–S29GL256N (Continued) Sector A23–A16 SA57 SA58 SA59 SA60 SA61 SA62 SA63 SA64 SA65 SA66 ...
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... Table 3. Sector Address Table–S29GL256N (Continued) Sector A23–A16 SA92 SA93 SA94 SA95 SA96 SA97 SA98 SA99 SA100 SA101 SA102 ...
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... Table 3. Sector Address Table–S29GL256N (Continued) Sector A23–A16 SA127 SA128 SA129 SA130 SA131 SA132 SA133 SA134 SA135 SA136 ...
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... Table 3. Sector Address Table–S29GL256N (Continued) Sector A23–A16 SA162 SA163 SA164 SA165 SA166 SA167 SA168 SA169 SA170 SA171 SA172 ...
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... Table 3. Sector Address Table–S29GL256N (Continued) Sector A23–A16 SA197 SA198 SA199 SA200 SA201 SA202 SA203 SA204 SA205 SA206 ...
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... Table 3. Sector Address Table–S29GL256N (Continued) Sector A23–A16 SA232 SA233 SA234 SA235 SA236 SA237 SA238 SA239 SA240 SA241 SA242 ...
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Table 4. Sector Address Table–S29GL128N (Continued) Sector A22–A16 SA6 SA7 SA8 SA9 SA10 ...
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Table 4. Sector Address Table–S29GL128N (Continued) Sector A22–A16 SA41 SA42 SA43 SA44 SA45 SA46 SA47 1 ...
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Table 4. Sector Address Table–S29GL128N (Continued) Sector A22–A16 SA76 SA77 SA78 SA79 SA80 ...
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Table 4. Sector Address Table–S29GL128N (Continued) Sector A22–A16 SA111 SA112 SA113 SA114 SA115 SA116 SA117 1 ...
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Table 5. Autoselect Codes, (High Voltage Method) WE Description CE# OE# # Manufacturer ID Spansion Product Cycle 1 Cycle Cycle 3 Cycle 1 Cycle 2 L ...
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Persistent Sector Protection method, they must set the Persistent Sector Protection Mode Locking Bit. This will permanently set the part to op- erate only using Persistent Sector Protection. If the customer decides to use the password method, they ...
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SecSi Sector Protection allows the user to lock the SecSi Sector area Persistent Protection Mode Lock Bit allows the user to set the device perma- nently to operate in the Persistent Protection Mode ...
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Setting the PPB Lock Bit to the “freeze state” disables all program and erase commands to the Non-Volatile PPB bits. In effect, the PPB Lock Bit locks the PPB bits into their current state. The only way to clear ...
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Persistent Protection Bit Lock (PPB Lock Bit) A global volatile bit. When set to the “freeze state”, the PPB bits cannot be changed. When cleared to the “unfreeze state”, the PPB bits are ...
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Password Protection Mode Lock Bit. This guarantees that a hacker could not place the device in Password Protection Mode. The Password Protection Mode Lock Bit resides in the “Lock Register”. Password Sector Protection The Password Sector Protection method allows ...
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Lock Bit, there will be no way to clear and unfreeze the PPB Lock Bit. The Pass- word Protection Mode Lock Bit, once programmed, prevents reading the 64-bit password on the DQ bus ...
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ACC function and unlock bypass modes are not available when the SecSi Sector is enabled. The SecSi sector address space in this device is allocated as follows: SecSi Sector Address Range 000000h–000007h 000008h–00007Fh The system accesses the SecSi ...
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Write Protect (WP#) The Write Protect function provides a hardware method of protecting the first or last sector group without using V by the WP#/ACC input. If the system asserts V erase functions ...
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JEDEC ID-independent, and forward- and back- ward-compatible for the specified flash device families. Flash vendors can standardize their existing interfaces for long-term compatibility. This device enters the CFI Query mode when the system writes the CFI Query ...
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Addresses Addresses (x16) (x8) 10h 20h 11h 22h 12h 24h 13h 26h 14h 28h 15h 2Ah 16h 2Ch 17h 2Eh 18h 30h 19h 32h 1Ah 34h Addresses Addresses (x16) (x8) 1Bh 36h 1Ch ...
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Addresses Addresses (x16) (x8) 27h 4Eh 28h 50h 29h 52h 2Ah 54h 2Bh 56h 2Ch 58h 2Dh 5Ah 2Eh 5Ch 2Fh 5Eh 30h 60h 31h 60h 32h 64h 33h 66h 34h 68h 35h 6Ah 36h 6Ch 37h 6Eh 38h 70h ...
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Table 11. Primary Vendor-Specific Extended Query Addresses Addresses (x16) (x8) 40h 80h 41h 82h 42h 84h 43h 86h 44h 88h 45h 8Ah 46h 8Ch 47h 8Eh 48h 90h 49h 92h 4Ah 94h 4Bh ...
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Reading Array Data The device is automatically set to reading array data after device power-up. No commands are required to retrieve data. The device is ready to read array data after completing an Embedded Program or Embedded Erase algorithm. After ...
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and requires V on address pin A9. The autoselect command sequence may be ID written to an address that is either in the read or erase-suspend-read mode. The autoselect command may not be ...
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Flash driver software and for occassional writng of in- dividual words. Use of Write Buffer Programming is strongly recommended for general programming use when more than a few words are to be programmed. The effective word programming ...
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Note that if a Write Buffer address location is loaded multiple times, the address/ data pair counter will be decremented for every data load operation. The host system must therefore account for loading ...
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V for operations other than accelerated programming, or device damage HH may result. WP# has an internal pullup; when unconnected, WP Figure 3 illustrates the algorithm for the program operation. Refer to the Erase and ...
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Write “Write to Buffer” command and Sector Address Write number of addresses to program minus 1(WC) and Sector Address Write first address/data Yes Abort Write to Buffer Operation? (Note ...
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Increment Address Note: mand sequence. Program Suspend/Program Resume Command Sequence The Program Suspend command allows the system to interrupt a programming operation or a Write to Buffer programming operation so that data can be read from any non-suspended sector. When ...
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After the Program Resume command is written, the device reverts to program- ming. The system can determine the status of the program operation using the DQ7 or DQ6 status bits, just as in ...
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Any commands written during the chip erase operation are ignored, including erase suspend commands. However, note that a hardware reset immediately terminates the erase operation. If that occurs, the chip erase command sequence should be reinitiated once the device has ...
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Notes: 1. See Table sequence. 2. See the section on DQ3 for information on the sector erase timer. Erase Suspend/Erase Resume Commands The Erase Suspend command, B0h, allows the system to interrupt a ...
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DQ7 or DQ6 status bits, just as in the standard word program operation. Refer to the Write Operation Status section for more information. In the erase-suspend-read mode, the system can also issue the autoselect com- mand ...
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Password Program Command Password Read Command Password Unlock Command The Password Program command permits programming the password that is used as part of the hardware protection scheme. The actual password is 64-bits long. ...
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... The PPB Program command is used to program, or set, a given PPB bit. Each PPB bit is individually programmed (but is bulk erased with the other PPB bits). The specific sector address (A24-A16 for S29GL512N, A23-A16 for S29GL256N, A22- A16 for S29GL128N) is written at the same time as the program command. If the PPB Lock Bit is set to the “ ...
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Reads and writes from the main memory are allowed. PPB Lock Bit Set Command The PPB Lock Bit Set command is used to set the PPB Lock Bit to the “freeze state” if ...
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Program to SecSi Sector Once the SecSi Sector Entry Command is issued, the SecSi Sector Exit command has to be issued to exit SecSi Sector Mode. SecSi Sector Exit Command The SecSi Sector Exit command may be issued to exit ...
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... Command Definitions Table 12. S29GL512N, S29GL256N, S29GL128N Command Definitions, x16 Command (Notes) Read (6) Reset (7) Manufacturer ID Device ID Sector Protect Verify Secure Device Verify (9) CFI Query (11) Program Write to Buffer Program Buffer to Flash (confirm) Write-to-Buffer-Abort Reset (16) Unlock Bypass Unlock Bypass Program (12) ...
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Command (Notes) Password Protection Command Set Entry Password Program (20) Password Read (19) Password Unlock (19) Password Protection Command Set Exit (18, 23) Non-Volatile Sector Protection Command Set Definitions Nonvolatile Sector Protection Command Set Entry PPB Program (24, 25) All ...
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... Issue this command sequence to return to READ mode after detecting device Write-to-Buffer-Abort state. NOTE: the full command sequence is required if resetting out of ABORT while using Unlock Bypass Mode. 17. S29GL512NH/L = 2223h/23h, 220h/01h; S29GL256NH/L = 2222h/22h, 2201h/01h; S29GL128NH/L = 2221h/21h, 2201h/ 01h. 18. The Exit command returns the device to reading the array. ...
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... Table 13. S29GL512N, S29GL256N, S29GL128N Command Definitions, x8 Command (Notes) Read (6) Reset (7) Manufacturer ID Device ID Sector Protect Verify Secure Device Verify (9) CFI Query (11) Write to Buffer Program Buffer to Flash (confirm) Write-to-Buffer-Abort Reset (16) Chip Erase Sector Erase Erase Suspend/Program Suspend (14) Erase Resume/Program Resume (15) SecSi Sector Entry ...
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Command (Notes) Non-Volatile Sector Protection Command Set Definitions Nonvolatile Sector Protection Command Set Entry PPB Program (24, 25) All PPB Erase PPB Status Read (25) Non-Volatile Sector Protection Command Set Exit (18) Global ...
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... Issue this command sequence to return to READ mode after detecting device Write-to-Buffer-Abort state. NOTE: the full command sequence is required if resetting out of ABORT while using Unlock Bypass Mode. 15. S29GL512NH/L = 2223h/23h, 220h/01h; S29GL256NH/L = 2222h/22h, 2201h/01h; S29GL128NH/L = 2221h/21h, 2201h/ 01h. 16. The Exit command returns the device to reading the array. ...
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gram address falls within a protected sector, Data# Polling on DQ7 is active for approximately 1 µs, then the device returns to the read mode. During the Embedded Erase algorithm, Data# Polling produces ...
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Notes Valid address for programming. During a sector erase operation, a valid address is any sector address within the sector being erased. During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be ...
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DQ6: Toggle Bit I Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete, or whether the device has entered the Erase Suspend mode. Toggle ...
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The system should recheck the toggle bit even if DQ5 = “1” because the toggle bit may stop toggling as DQ5 changes to “1.” See the subsections on DQ6 and DQ2 for more information. DQ2: ...
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read cycles.) But DQ2 cannot distinguish whether the sector is actively erasing or is erase-suspended. DQ6, by comparison, indicates whether the device is actively erasing Erase Suspend, but cannot distinguish ...
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When the time-out period is complete, DQ3 switches from a “0” “1.” If the time between additional sector erase commands from the system can be as- sumed to be less than 50 µs, the system need not monitor ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature, Plastic Packages . . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied . . ...
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DC Characteristics CMOS Compatible Parameter Parameter Description Symbol (Notes) I Input Load Current ( Input Load Current LIT I Output Leakage Current LO V Active Read Current IO I IO1 (Switching Current Non-Active Output IO2 ...
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Test Conditions Device Under Test C L 6.2 kΩ Note: Diodes are IN3064 or equivalent. Figure 9. Test Setup Note < the reference level is 0 ...
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AC Characteristics Read-Only Operations–S29GL512N Only Parameter JEDEC Std. Description t AVAV t Read Cycle Time RC Address to Output Delay t t AVQV ACC (Note 2) Chip Enable to Output Delay t t ELQV CE (Note 3) t PAC Page ...
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... Characteristics Read-Only Operations–S29GL256N Only Parameter JEDEC Std. Description t t Read Cycle Time AVAV Address to Output Delay (Note 2) AVQV ACC Chip Enable to Output Delay t t ELQV CE (Note 3) t PAC Page Access Time Output Enable to Output Delay ...
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AC Characteristics Read-Only Operations–S29GL128N Only Parameter JEDEC Std. Description t t Read Cycle Time AVAV Address to Output Delay (Note 2) AVQV ACC t t Chip Enable to Output Delay (Note 3) ELQV CE t PAC Page ...
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Characteristics Addresses CE# OE# WE# Outputs RESET# RY/BY A23-A2 A2-A0* Data Bus CE# OE# * Figure shows word mode. Addresses are A2–A-1 for byte mode. May 13, 2004 27631A4 I ...
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AC Characteristics Hardware Reset (RESET#) Parameter JEDEC Std. RESET# Pin Low (During Embedded Algorithms) t Ready to Read Mode (See Note) RESET# Pin Low (NOT During Embedded t Ready Algorithms) to Read Mode (See Note) t RESET# Pulse Width RP ...
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Characteristics Erase and Program Operations–S29GL512N Only Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL AS Address Setup Time to OE# low ...
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... AC Characteristics Erase and Program Operations–S29GL256N Only Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL AS Address Setup Time to OE# low during toggle t ASO bit polling t t Address Hold Time WLAX AH Address Hold Time From CE# or OE# high ...
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Characteristics Erase and Program Operations–S29GL128N Only Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL AS Address Setup Time to OE# low ...
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AC Characteristics Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY VCS Notes program address program data Illustration shows device in word ...
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Characteristics Erase Command Sequence (last two cycles Addresses 2AAh CE Data RY/BY# t VCS V CC Notes sector address ...
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AC Characteristics t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ6–DQ0 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...
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Characteristics Addresses CE# t OEH WE# OE Valid Data DQ2 and DQ6 RY/BY# Note Valid address; not required for DQ6. Illustration shows first two status cycle after command ...
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AC Characteristics Alternate CE# Controlled Erase and Program Operations–S29GL512N Only Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time ELAX Data ...
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... Characteristics Alternate CE# Controlled Erase and Program Operations–S29GL256N Only Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time ELAX Data Setup Time DVEH Data Hold Time ...
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AC Characteristics Alternate CE# Controlled Erase and Program Operations–S29GL128N Only Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time ELAX Data ...
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Characteristics 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes: 1. Figure indicates last two bus cycles of a ...
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... Total Accelerated Effective Write Buffer Programming Time (Note 3) S29GL128N Chip Program Time S29GL256N S29GL512N Notes: 1. Typical program and erase times assume the following conditions: 25°C, 3 pattern. 2. Under worst case conditions of 90° Effective write buffer specification is based upon a 16-word write buffer operation. ...
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Physical Dimensions TS056—56-Pin Standard Thin Small Outline Package (TSOP) PACKAGE TS 56 JEDEC MO-142 (B) EC SYMBOL MIN. NOM. MAX. A --- --- 1.20 A1 0.05 --- 0.15 A2 0.95 1.00 1.05 b1 ...
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Physical Dimensions LAA064—64-Ball Fortified Ball Grid Array (FBGA) 106 S29GLxxxN MirrorBitTM Flash Family 27631A4 May 13, 2004 ...
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Revision Summary Revision A (September 2, 2003) Initial Release. Revision A+1 (October 16, 2003) Global Added LAA064 package. Distinctive Characteristics, Performance Characteristics Clarified fifth bullet information. Added RTSOP to Package Options. Distinctive Characteristics, ...
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Revision A+2 (January 22, 2004) Lock Register Corrected and added new text for SecSi Sector Protection Bit, Persistent Protec- tion Mode Lock Bit, and Password Protection Mode Lock Bit. Persistent Sector Protection Persistent Protection Bit (PPB): Added the second paragraph ...
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... Replaced all text. Table 12, “S29GL512N, S29GL256N, S29GL128N Command Definitions, x16” Changed the first cycle address of CFI Query to 55. Table 13, “S29GL512N, S29GL256N, S29GL128N Command Definitions, x8” Changed the third cycle data Device ID to 90. Removed Unlock Bypass Reset. Removed Note 12 and 13. ...
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Figure 11, “Read Operation Timings,” Added t to figure. CEH Figure 12, “Page Read Timings,” Change A1-A0 to A2-A0. Erase and Program Operations Updated t and t WHWH1 Figure 16, “Chip/Sector Erase Operation Timings,” Changed 5555h to 55h and 3030h ...