CY7C135 CYPRESS [Cypress Semiconductor], CY7C135 Datasheet - Page 2

• Manufacturer Part Number: CY7C135
• Description: 4K x 8 Dual-Port Static RAM and 4K x 8 Dual-Port SRAM with Semaphores
• Manufacturer: CYPRESS [Cypress Semiconductor]

Pin Configurations
Selection Guide
Pin Definitions
Document #: 38-06038 Rev. *B
Maximum Access Time (ns)
Maximum Operating
Current (mA)
Maximum Standby
Current for I
A
CE
OE
R/W
SEM
(CY7C1342 only)
0L–11L
L
L
Left Port
L
L
SB1
(mA)
A
CE
OE
R/W
SEM
(CY7C1342 only)
0R–11R
R
Right Port
R
R
R
Commercial
Commercial
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
1L
2L
3L
4L
5L
6L
7L
8L
9L
0L
1L
2L
3L
1L
2L
3L
4L
5L
6L
7L
8L
9L
0L
1L
2L
3L
Address Lines
Chip Enable
Output Enable
Read/Write Enable
Semaphore Enable. When asserted LOW, allows access to eight semaphores. The
three least significant bits of the address lines will determine which semaphore to write
or read. The I/O
by writing a 0 into the respective location.
8
9
10
11
12
13
14
15
16
17
18
19
20
8
9
10
11
12
13
14
15
16
17
18
19
20
21 22 23 24 25 26 27 28 29 30 31 32 33
21 22 23 24 25 26 27 28 29 30 31 32 33
7 6 5 4 3 2
7 6 5 4 3 2
7C1342–15
7C135–15
220
15
60
Top View
Top View
0
7C1342
PLCC
PLCC
7C135
pin is used when writing to a semaphore. Semaphores are requested
1
1
52 51 50 49 48 47
52 51 50 49 48 47
7C1342–20
7C135–20
190
20
50
46
45
44
43
42
41
40
39
38
37
36
35
34
46
45
44
43
42
41
40
39
38
37
36
35
34
Description
OE
A
A
A
A
A
A
A
A
A
A
NC
I/O
OE
A
A
A
A
A
A
A
A
A
A
NC
I/O
0R
1R
2R
3R
4R
5R
6R
7R
8R
9R
0R
1R
2R
3R
4R
5R
6R
7R
8R
9R
7R
R
7R
R
7C1342–25
1342–3
7C135–25
1342–4
180
25
40
7C1342–35
7C135–35
160
35
30
CY7C1342
CY7C135
7C1342–55
7C135–55
Page 2 of 12
160
55
30