CY7C138 CYPRESS [Cypress Semiconductor], CY7C138 Datasheet - Page 6

• Manufacturer Part Number: CY7C138
• Description: 4K x 8/9 Dual-Port Static RAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Switching Characteristics
Switching Waveforms
Notes:
10. Test conditions used are Load 3.
12. For information on part-to-part delay through RAM cells from writing port to reading port, refer to Read Timing with Port-to-Port Delay waveform.
13. Test conditions used are Load 2.
14. t
15. R/W is HIGH for read cycle.
16. Device is continuously selected CE = LOW and OE = LOW. This waveform cannot be used for semaphore reads.
17. Address valid prior to or coincident with CE transition LOW.
18. CE
11. This parameter is guaranteed but not tested.
8.
9.
SEMAPHORE TIMING
t
t
t
SOP
SWRD
SPS
Parameter
Read Cycle No. 1 (Either Port Address Access)
DATA OUT
ADDRESS
Read Cycle No. 2 (Either Port CE/OE Access)
Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
At any given temperature and voltage condition for any given device, t
OI
BDD
/I
L
SEM or CE
DATA OUT
OH
= L, SEM = H when accessing RAM. CE = H, SEM = L when accessing semaphores.
is a calculated parameter and is the greater of t
and 30-pF load capacitance.
I
OE
I
CC
SB
SEM Flag Update Pulse (OE or SEM)
SEM Flag Write to Read Time
SEM Flag Contention Window
PREVIOUS DATA VALID
t
PU
Description
t
OHA
t
LZCE
Over the Operating Range
t
LZOE
WDD
t
AA
- t
t
ACE
PWE
(actual) or t
[15, 17, 18]
[15, 16]
t
DOE
Min.
10
7C138-15
7C139-15
5
5
DDD
HZCE
- t
t
RC
SD
Max.
is less than t
[8]
6
(actual).
(continued)
Min.
LZCE
10
5
5
7C138-25
7C139-25
and t
DATA VALID
HZOE
Max.
is less than t
Min.
15
7C138-35
7C139-35
5
5
DATA VALID
t
LZOE
HZOE
.
Max.
t
HZCE
Min.
20
7C138-55
7C139-55
5
5
t
PD
CY7C138
CY7C139
Max.
C138-8
C138-9
Unit
ns
ns
ns