CY7C1360C CYPRESS [Cypress Semiconductor], CY7C1360C Datasheet - Page 2

• Manufacturer Part Number: CY7C1360C
• Description: 9-Mbit (256K x 36/512K x 18) Pipelined SRAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-05540 Rev. *C
Selection Guide
Logic Block Diagram – CY7C1362C (512K x 18)
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
Shaded areas contain advance information. Please contact your local Cypress sales representative for availability of these parts.
A0, A1, A
MODE
ADSC
ADSP
BW
ADV
BW
BWE
CLK
GW
CE2
CE3
CE
OE
ZZ
A
B
1
WRITE REGISTER
WRITE REGISTER
CONTROL
SLEEP
REGISTER
ADDRESS
DQ
DQ
REGISTER
ENABLE
B,
A,
DQP
DQP
B
A
COUNTER AND
CLR
BURST
LOGIC
2
PIPELINED
ENABLE
Q1
Q0
A[1:0]
PRELIMINARY
250 MHz
250
2.8
WRITE DRIVER
30
WRITE DRIVER
DQ
DQ
B,
A,
DQP
DQP
B
A
MEMORY
ARRAY
200 MHz
220
3.0
30
SENSE
AMPS
REGISTERS
OUTPUT
166 MHz
180
3.5
30
CY7C1360C
CY7C1362C
BUFFERS
OUTPUT
E
REGISTERS
Page 2 of 31
INPUT
Unit
mA
mA
ns
DQs
DQP
DQP
A
B