CY7C1360C CYPRESS [Cypress Semiconductor], CY7C1360C Datasheet - Page 20

• Manufacturer Part Number: CY7C1360C
• Description: 9-Mbit (256K x 36/512K x 18) Pipelined SRAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document #: 38-05540 Rev. *C
AC Test Loads and Waveforms
Thermal Resistance
Capacitance
Switching Characteristics
Θ
Θ
C
C
C
t
Clock
t
t
t
Output Times
t
t
Notes:
Parameter
17. Timing reference level is 1.5V when V
18. Test conditions shown in (a) of AC Test Loads unless otherwise noted.
3.3V I/O Test Load
POWER
CYC
CH
CL
CO
DOH
Parameter
2.5V I/O Test Load
JA
JC
IN
CLK
I/O
OUTPUT
OUTPUT
Parameter
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Z
Z
[14]
V
Clock Cycle Time
Clock HIGH
Clock LOW
Data Output Valid after CLK Rise
Data Output Hold after CLK Rise
0
0
DD
Input Capacitance
Clock Input Capacitance
Input/Output Capacitance
Description
= 50Ω
= 50Ω
(Typical) to the First Access
(a)
(a)
V
V
[14]
T
Description
T
= 1.25V
= 1.5V
Description
R
R
DDQ
L
L
= 50Ω
= 50Ω
Over the Operating Range
= 3.3V and is 1.25V when V
Test conditions follow standard test
methods and procedures for
measuring thermal impedance, per
EIA/JESD51.
OUTPUT
OUTPUT
3.3V
2.5V
INCLUDING
INCLUDING
JIG AND
JIG AND
SCOPE
SCOPE
Test Conditions
T
V
V
[19]
A
DD
DDQ
PRELIMINARY
5 pF
5 pF
= 25°C, f = 1 MHz,
= 3.3V
Test Conditions
= 2.5V
DDQ
(b)
(b)
R = 317Ω
R = 1667Ω
[17, 18]
= 2.5V.
Min.
1.25
4.0
1.8
1.8
1
R = 351Ω
R =1538Ω
250 MHz
Max
2.8
100 TQFP
V
Package
GND
GND
V
100 TQFP
DDQ
29.41
Package
DDQ
6.13
≤ 1 ns
≤ 1 ns
Min.
1.25
5
5
5
5.0
2.0
2.0
1
200 MHz
10%
10%
119 BGA
Package
ALL INPUT PULSES
ALL INPUT PULSES
Max
3.0
34.1
14.0
119 BGA
Package
90%
90%
7
5
5
(c)
(c)
Min.
1.25
6.0
2.4
2.4
1
166 MHz
CY7C1360C
CY7C1362C
165 fBGA
Package
165 fBGA
Package
16.8
3
Max
Page 20 of 31
5
5
7
3.5
90%
90%
10%
10%
≤ 1 ns
≤ 1 ns
Unit
°C/W
°C/W
ms
Unit
ns
ns
ns
ns
ns
Unit
pF
pF
pF