SI5338 SILABS [Silicon Laboratories], SI5338 Datasheet - Page 13

• Manufacturer Part Number: SI5338
• Description: I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR
• Manufacturer: SILABS [Silicon Laboratories]

Table 13. Typical Phase Noise Performance
Table 12. Jitter Specifications
(V
Offset Frequency
100 Hz
1 kHz
10 kHz
100 kHz
1 MHz
10 MHz
Parameter
Deterministic Jitter
Total Jitter
(12 kHz–20 MHz)
Notes:
DD
1. All jitter measurements apply for LVDS/HCSL/LVPECL output format with a low noise differential input clock and are
2. For best jitter performance, keep the single ended clock input slew rates at Pins 3 and 4 more than 1.0 V/ns and the
3. D
4. Output MultiSynth in Integer mode.
5. Input frequency to the Phase Detector between 25 and 40 MHz and any output frequency > 5 MHz.
6. Measured in accordance with JEDEC standard 65.
7. Rj is multiplied by 14; estimate the pp jitter from Rj over 2
= 1.8 V –5% to +10%, 2.5 V ±10%, or 3.3 V ±10%, T
made with an Agilent 90804 oscilloscope. All RJ measurements use RJ/DJ separation.
differential clock input slew rates more than 0.3 V/ns.
J
for PCI and GBE is < 5 ps pp
T
(See Note
J
= D
Symbol
1,2
D
J
to 156.25 MHz
+14xR
J
25MHz XTAL
(Continued)
7
–120
–126
–132
–132
–145
–90
)
J
Output MultiSynth
operated in fractional
mode
Output MultiSynth
operated in integer
mode
Output MultiSynth
operated in fractional
mode
Output MultiSynth
operated in integer
mode
Test Condition
A
5
5
5
5
Rev. 0.6
= –40 to 85 °C)
12
to 148.3517 MHz
27 MHz Ref In
rising edges.
–130
–132
–145
–117
–123
–87
Min
—
—
—
—
19.44 MHz Ref In
to 155.52 MHz
Typ
13
12
3
2
–123
–128
–128
–145
–110
–116
Max
15
10
36
20
Si5338
ps pk-pk
ps pk-pk
ps pk-pk
ps pk-pk
dBc/Hz
Units
Unit
13