SI5338 SILABS [Silicon Laboratories], SI5338 Datasheet - Page 9

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SI5338

Manufacturer Part Number
SI5338
Description
I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR
Manufacturer
SILABS [Silicon Laboratories]
Datasheet

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Table 6. Input and Output Clock Characteristics (Continued)
(V
Parameter
Output Clocks (Single-Ended)
Frequency
CMOS 20%–80%
Rise/Fall Time
CMOS 20%–80%
Rise/Fall Time
CMOS Output Resis-
tance
SSTL Output
Resistance
HSTL Output
Resistance
CMOS Output Voltage
SSTL Output Voltage
HSTL Output Voltage
Duty Cycle
Notes:
DD
1. For best jitter performance, keep the input slew rate on pins 1,2,5,6 faster than 0.3 V/ns
2. Not in PLL bypass mode.
3. For best jitter performance, keep the input single ended slew rate on pins 3 or 4 faster than 1 V/ns
4. Only two unique frequencies above 350 MHz can be simultaneously output, Fvco/4 and Fvco/6.
5. Includes effect of internal series 22  resistor.
= 1.8 V –5% to +10%, 2.5 V ±10%, or 3.3 V ±10%, T
2
5
Symbol
f
t
t
V
V
V
V
V
V
V
V
V
V
DC
OUT
R
R
OH
OH
OH
OH
OH
OL
OL
OL
OL
OL
/t
/t
F
F
SSTL-18 VDDOx = 1.71
SSTL-2 VDDOx = 2.25
SSTL-3 VDDOx = 2.97
VDDO = 1.4 to 1.6 V
Test Condition
SSTL, HSTL
15 pF load
4 mA load
4 mA load
2 pF load
to 3.63 V
to 2.75 V
to 1.98 V
CMOS
A
Rev. 0.6
= –40 to 85 °C)
0.45xVDDO+0.41
0.5xVDDO+0.41
0.5xVDDO+0.34
0.5xVDDO+0.3
VDDO – 0.3
0.16
0.16
Min
45
0.45
Typ
50
50
50
0.45xVDDO–0.41
0.5xVDDO–0.41
0.5xVDDO–0.34
0.5xVDDO –0.3
0.85
Max
200
350
1.7
0.3
55
Si5338
Units
MHz
MHz
ns
ns
%
V
V
V
V
V
V
V
V
V
V
9

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