SI5338 SILABS [Silicon Laboratories], SI5338 Datasheet - Page 72

• Manufacturer Part Number: SI5338
• Description: I2C-PROGRAMMABLE ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR
• Manufacturer: SILABS [Silicon Laboratories]

Si5338
Reset value = xxxx x111
72
Register 51.
Name
Type
Bit
2:0
Bit
7
6
5
4
3
MS3_HS
MS_PEC[2:0]
R/W
D7
MS3_HS
MS2_HS
MS1_HS
MS0_HS
Unused
Name
MS2_HS
R/W
D6
MultiSynth3 High Speed Mode.
When this bit is asserted, MultiSynth3 will only accept divide ratios of 4.0 or 6.0. Incre-
ment/decrement, SSC, and all phase functions are not available when this bit is set.
0: MultiSynth3 implements fractional divide ratios between 8 and 1023
1: MultiSynth3 can only implement 4.0 or 6.0 divide ratio.
MultiSynth2 High Speed Mode.
When this bit is asserted, MultiSynth2 will only accept divide ratios of 4.0 or 6.0. Incre-
ment/decrement, SSC, and all phase functions are not available when this bit is set.
0: MultiSynth2 implements fractional divide ratios between 8 and 1023.
1: MultiSynth2 can only implement 4.0 or 6.0 divide ratio.
MultiSynth1 High Speed Mode.
When this bit is asserted, MultiSynth1 will only accept divide ratios of 4.0 or 6.0. Incre-
ment/decrement, SSC, and all phase functions are not available when this bit is set.
0: MultiSynth1 implements fractional divide ratios between 8 and 1023.
1: MultiSynth1 can only implement 4.0 or 6.0 divide ratio.
MultiSynth0 High Speed Mode.
When this bit is asserted, MultiSynth0 will only accept divide ratios of 4.0 or 6.0. Incre-
ment/decrement, SSC, and all phase functions are not available when this bit is set.
0: MultiSynth0 implements fractional divide ratios between 8 and 1023.
1: MultiSynth0 can only implement 4.0 or 6.0 divide ratio.
Unused.
MultiSynth Phase Error Correction.
All non-factory programmed devices must have 111b written to these bits.
MS1_HS
R/W
D5
MS0_HS
R/W
D4
Rev. 0.6
D3
Function
D2
MS_PEC[2:0]
D1
D0