MK20DN512VMC10 FREESCALE [Freescale Semiconductor, Inc], MK20DN512VMC10 Datasheet - Page 19

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MK20DN512VMC10

Manufacturer Part Number
MK20DN512VMC10
Description
K20 Sub-Family
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1. The frequency limitations in VLPR mode here override any frequency specification listed in the timing specification for any
5.3.2 General switching specifications
These general purpose specifications apply to all signals configured for GPIO, UART,
CAN, CMT, and I
Freescale Semiconductor, Inc.
f
f
FlexCAN_ERCLK
LPTMR_ERCLK
Symbol
f
f
other module.
f
LPTMR_pin
Symbol
I2S_MCLK
I2S_BCLK
f
ERCLK
GPIO pin interrupt pulse width (digital glitch filter
disabled) — Synchronous path
GPIO pin interrupt pulse width (digital glitch filter
disabled, analog filter enabled) — Asynchronous path
GPIO pin interrupt pulse width (digital glitch filter
disabled, analog filter disabled) — Asynchronous path
External reset pulse width (digital glitch filter disabled)
Mode select (EZP_CS) hold time after reset
deassertion
Port rise and fall time (high drive strength)
Description
External reference clock
LPTMR clock
LPTMR external reference clock
FlexCAN external reference clock
I2S master clock
I2S bit clock
Description
• Slew disabled
• Slew enabled
• 1.71 ≤ V
• 2.7 ≤ V
• 1.71 ≤ V
• 2.7 ≤ V
2
C signals.
Table 9. Device clock specifications (continued)
Table 10. General switching specifications
DD
DD
DD
DD
≤ 3.6V
≤ 3.6V
K20 Sub-Family Data Sheet, Rev. 1, 6/2012.
≤ 2.7V
≤ 2.7V
Table continues on the next page...
General Business Information
Preliminary
Min.
100
100
1.5
16
Min.
2
Max.
Max.
12.5
12
36
24
6
16
25
16
8
4
Bus clock
Bus clock
cycles
cycles
Unit
MHz
MHz
MHz
MHz
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
Notes
Notes
1,
General
3
3
3
4
2
19

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