MK20DN512VMC10 FREESCALE [Freescale Semiconductor, Inc], MK20DN512VMC10 Datasheet - Page 64

• Manufacturer Part Number: MK20DN512VMC10
• Description: K20 Sub-Family
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Peripheral operating requirements and behaviors
1. Applies to first bit in each frame and only if the TCR4[FSE] bit is clear
64
S11
S12
S13
S14
S15
S16
S17
S18
S19
I2S_MCLK (output)
I2S_TX_BCLK/
I2S_RX_BCLK (output)
I2S_TX_FS/
I2S_RX_FS (output)
I2S_TX_FS/
I2S_RX_FS (input)
I2S_TXD
I2S_RXD
Num.
Table 48. I2S/SAI slave mode timing in Normal Run, Wait and Stop modes
Operating voltage
I2S_TX_BCLK/I2S_RX_BCLK cycle time (input)
I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low
(input)
I2S_TX_FS/I2S_RX_FS input setup before
I2S_TX_BCLK/I2S_RX_BCLK
I2S_TX_FS/I2S_RX_FS input hold after
I2S_TX_BCLK/I2S_RX_BCLK
I2S_TX_BCLK to I2S_TXD/I2S_TX_FS output valid
I2S_TX_BCLK to I2S_TXD/I2S_TX_FS output invalid
I2S_RXD setup before I2S_RX_BCLK
I2S_RXD hold after I2S_RX_BCLK
I2S_TX_FS input assertion to I2S_TXD output valid
(full voltage range)
S5
S7
Figure 27. I2S/SAI timing — master modes
Characteristic
S4
K20 Sub-Family Data Sheet, Rev. 1, 6/2012.
S9
S9
S1
General Business Information
S3
S2
S10
Preliminary
S4
S2
1
S8
1.71
80
45%
5.8
2
—
0
5.8
2
—
S7
Min.
3.6
—
55%
—
—
20.6
—
—
—
25
Max.
Freescale Semiconductor, Inc.
V
ns
MCLK period
ns
ns
ns
ns
ns
ns
ns
Unit
S10
S6
S8