MK20DN512VMC10 FREESCALE [Freescale Semiconductor, Inc], MK20DN512VMC10 Datasheet - Page 60

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MK20DN512VMC10

Manufacturer Part Number
MK20DN512VMC10
Description
K20 Sub-Family
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Peripheral operating requirements and behaviors
6.8.9 SDHC specifications
The following timing specs are defined at the chip I/O pin and must be translated
appropriately to arrive at timing specs/constraints for the physical interface.
60
Num
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SDHC_CLK
Output SDHC_CMD
Output SDHC_DAT[3:0]
Input SDHC_CMD
Input SDHC_DAT[3:0]
Symbol
t
t
t
t
fpp
fpp
fpp
f
t
t
TLH
THL
WH
ISU
t
OD
WL
OD
IH
Operating voltage
Clock frequency (low speed)
Clock frequency (SD\SDIO full speed)
Clock frequency (MMC full speed)
Clock frequency (identification mode)
Clock low time
Clock high time
Clock rise time
Clock fall time
SDHC output / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
SDHC output delay (output valid)
SDHC input setup time
SDHC input hold time
Description
SDHC input / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
Table 44. SDHC switching specifications
K20 Sub-Family Data Sheet, Rev. 1, 6/2012.
SD3
SD6
General Business Information
Figure 24. SDHC timing
SD2
SD7
Preliminary
SD8
Card input clock
SD1
Min.
2.7
-5
0
0
0
0
7
7
5
0
Freescale Semiconductor, Inc.
Max.
400
400
3.6
6.5
25
20
3
3
MHz
MHz
Unit
kHz
kHz
ns
ns
ns
ns
ns
ns
ns
V

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