MK20DN512VMC10 FREESCALE [Freescale Semiconductor, Inc], MK20DN512VMC10 Datasheet - Page 65

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MK20DN512VMC10

Manufacturer Part Number
MK20DN512VMC10
Description
K20 Sub-Family
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
6.8.10.3 VLPR, VLPW, and VLPS mode performance over the full
This section provides the operating performance over the full operating voltage for the
device in VLPR, VLPW, and VLPS modes.
Freescale Semiconductor, Inc.
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
I2S_TX_BCLK/
I2S_RX_BCLK (input)
I2S_TX_FS/
I2S_RX_FS (output)
I2S_TX_FS/
I2S_RX_FS (input)
I2S_TXD
I2S_RXD
Num.
Table 49. I2S/SAI master mode timing in VLPR, VLPW, and VLPS modes
Operating voltage
I2S_MCLK cycle time
I2S_MCLK pulse width high/low
I2S_TX_BCLK/I2S_RX_BCLK cycle time (output)
I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low
I2S_TX_BCLK/I2S_RX_BCLK to I2S_TX_FS/
I2S_RX_FS output valid
I2S_TX_BCLK/I2S_RX_BCLK to I2S_TX_FS/
I2S_RX_FS output invalid
I2S_TX_BCLK to I2S_TXD valid
I2S_TX_BCLK to I2S_TXD invalid
I2S_RXD/I2S_RX_FS input setup before
I2S_RX_BCLK
I2S_RXD/I2S_RX_FS input hold after I2S_RX_BCLK
operating voltage range
(full voltage range)
S15
S15
Figure 28. I2S/SAI timing — slave modes
S12
Characteristic
S19
S13
K20 Sub-Family Data Sheet, Rev. 1, 6/2012.
S17
S11
General Business Information
S18
S12
Preliminary
S16
1.71
62.5
45%
250
45%
0
0
45
0
S15
Peripheral operating requirements and behaviors
Min.
3.6
55%
55%
45
45
Max.
V
ns
MCLK period
ns
BCLK period
ns
ns
ns
ns
ns
ns
S14
Unit
S16
S16
65

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