CY7C64713 CYPRESS [Cypress Semiconductor], CY7C64713 Datasheet - Page 8

• Manufacturer Part Number: CY7C64713
• Manufacturer: CYPRESS [Cypress Semiconductor]

4.11
4.12
4.12.1
4.12.2
Document #: 38-08039 Rev. *B
• 3 × 64 bytes
• 8 × 512 bytes (Endpoints 2, 4, 6, 8)
• EP0—Bidirectional endpoint zero, 64-byte buffer
• EP1IN, EP1OUT—64-byte buffers, bulk or interrupt
• EP2,4,6,8—Eight 512-byte buffers, bulk, interrupt, or isoch-
ronous, of which only the transfer size is available.
EP4 and EP8 can be double buffered, while EP2 and 6 can
Register Addresses
Endpoint RAM
Size
Organization
(Endpoints 0 and 1)
FFFF
F000
EFFF
E800
E7FF
E740
E400
E1FF
E7C0
E7BF
E780
E77F
E73F
E700
E6FF
E500
E4FF
E480
E47F
E3FF
E200
E000
128 bytes GPIF Waveforms
8051 Addressable Registers
Not all Space is available
64 Bytes EP0 IN/OUT
64 Bytes RESERVED
2 KBytes RESERVED
Reserved (512)
4 KBytes EP2-EP8
for all transfer types
64 Bytes EP1OUT
64 Bytes EP1IN
Reserved (128)
8051 xdata RAM
512 bytes
(8 x 512)
buffers
4.12.3
A separate 8-byte buffer at 0xE6B8-0xE6BF holds the Setup
data from a CONTROL transfer.
(512)
be either double, triple, or quad buffered. Regardless of the
physical size of the buffer, each endpoint buffer accommo-
dates only one full-speed packet. For bulk endpoints the
maximum number of bytes it can accommodate is 64, even
though the physical buffer size is 512 or 1024. For an
ISOCHRONOUS endpoint the maximum number of bytes
it can accommodate is 1023. For endpoint configuration
options, see Figure 4-5.
Setup Data Buffer
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