AD2S93BP AD [Analog Devices], AD2S93BP Datasheet - Page 6

no-image

AD2S93BP

Manufacturer Part Number
AD2S93BP
Description
Low Cost LVDT-to-Digital Converter
Manufacturer
AD [Analog Devices]
Datasheet
AD2S93
If the maximum operating stroke of an LVDT yielded a 1 V rms
A–B output, the weighting of the LVDT to AD2S93 digital out-
put would be:
This can be equated directly to the LVDT sensitivity specifica-
tion in mm/v/v.
Note: The overrange and underrange quadrants can be utilized
by decoding the overrange and underrange MSBs and decoding
the 12 magnitude bits. This will increase the operating range of
the AD2S93 accordingly. However, if the input A–B > V
then the converter will lose track of the input and will only re-
gain track when the input signal returns to within the operating
range of the converter.
INPUT GAIN
Since the transformation ratio of an LVDT or RVDT from exci-
tation voltage to signal voltage can be 1:0.15, provision for gain
scaling has been provided. The gain can, therefore, be selected
to ensure that the full-scale output of converter represents the
maximum stroke position of the transducer.
The gain setting is accomplished by connecting Pin 2, (DIFF)
and Pin 3 (GAIN) together (unity gain) or connecting two resis-
tors as shown in Figure 3.
The gain of the input stage is calculated using the following
equation:
e.g., For a gain of 5, R3 = 12 k , R4 = 3 k
For a gain of 10, R3 = 18 k , R4 = 2 k
Full-Scale Operating Range ( 2
Input Scaling
Input Signal Full Scale
DIFF ( A – B)
( A – B) IN
SIGN
OVR
UNR
LOS
1 2 2
2
13
0100
0100
0100
0000
0000
0001
0001
0001
0001
0011
0011
0011
345 V/LSB
1
0000
1111
0000
0000
1111
0000
0000
1111
1111
0000
0000
1111
R
R
OUTPUT CODES
MAGNITUDE
3
4
12
0000
1111
0000
0000
1111
0000
0000
1111
1111
0000
0000
1111
)
Figure 2. Output Code Format
0000
0001
1111
0000
0001
1110
0000
0001
0000
1111
1111
1111
REF
–VE POSITION
+VE POSITION
FULL SCALE
FULL SCALE
–6–
POSITION
NULL
SETTING THE CONVERTER BANDWIDTH
The AD2S93 bandwidth is set by placing three external compo-
nents, C1, C2, and R2, around the integrator as illustrated by
the figure below.
Before the bandwidth can be set, the corresponding VCO gain
setting must be determined. The VCO gain is directly related to
the slew rate of the converter. This is set internally to two dif-
ferent rates defined internally by R
Typical converter slew rates are defined below,
TH
I
UNDER-
RANGE
A – B = – REF/2
G (1) = 2400 LSB/ms–Mode 1
G (2) = 800 LSB/ms–Mode 2
TH
R1
O
–1
AGND
Figure 3. Pre-Amp Gain Block
Figure 4. Integrator and VCO
C2
RATIO OF A- B/REF/2
INT
A – B = 0
R2
RANGE
R4
0
C1
A – B = + REF/2
R3
R
V
≠ 1
GAIN
V
A
B
DIFF
.
RANGE
OVER-
VCO
C
V
62.5
REV. A

Related parts for AD2S93BP