AD2S93BP AD [Analog Devices], AD2S93BP Datasheet - Page 9

• Manufacturer Part Number: AD2S93BP
• Description: Low Cost LVDT-to-Digital Converter
• Manufacturer: AD [Analog Devices]

Two-Wire LVDT Connection
This method should be used in cases where the sum of the
LVDT secondary output voltages (A + B) is not constant with
LVDT displacement over the desired stroke length. This method
of connection, shown in Figure 7, still maintains the ratiometric
operation and the insensitivity to variations in reference ampli-
tude and frequency. However, the phase shift between V
and V1 should be minimized to maintain accuracy (see Section
“PHASE SHIFT AND QUADRATURE EFFECTS”). Sug-
gested phase compensation circuits are shown in Figure 7.
PHASE SHIFT AND QUADRATURE EFFECTS
Reference to signal phase shift can be high in LVDTs, some-
times in the order of 70 degrees. If the converter is connected
as in Figures 5 and 6, any effects due to this phase shift are
minimized. This connection method, therefore, provides out-
standing benefits.
The additional gain error caused by reference to signal phase
shifts is given by:
where
When the phase shift between V
quadrature on the signal will have no effect on the converter.
This is another benefit of the conversion method. For example,
when a REF lags (A–B) by approximately 10 , the gain error is
approximately 1%. When (A–B) lags REF by approximately
10 , the gain error is approximately 2%.
REV. A
(1 – cos ) 100% of FSR
= phase shift between V
PHASE LEAD = ARCTAN
OSC
PHASE
PHASE
SHIFT
SHIFT
CCT
CCT
C
REF
PISTON
R
REF
2 fRC
and V1 is zero, additional
and DIFF.
1
PHASE LAG = ARCTAN 2
Figure 7. Two-Wire LVDT Connection
R
V
R4
REF
DD
12k
C
R3
AGND
GAIN
DIFF
LOS
–9–
NC 26
fRC
B
A
REF
REMOTE MULTIPLE SENSOR INTERFACING
The DATA output of the AD2S93 is held in a high impedance
state until CS is taken LO. This allows a user to operate the
AD2S93 in an application with more than one converter con-
nected on the same line. Figure 8 shows four LVDTs interfaced
to four AD2S93s. Excitation for the LVDT is provided locally
by an oscillator.
SCLK, DATA and two address lines are fed down low loss
cables suitable for communication links. The two address lines
are decoded locally into CS for the individual converters. Data
is received and transmitted using transmitters and receivers.
27
28
1
2
3
4
1
2
3
4
LVDT
LVDT
LVDT
LVDT
25 24
25 24
5
5
2
BUFFER
6
6
4
4
4
4
C1
23
23
(Not to Scale)
(Not to Scale)
R2
7
7
AD2S93
TOP VIEW
TOP VIEW
Figure 8. Remote Sensor Interface
AD2S93
AD2S93
AD2S93
AD2S93
C2
AD2S93
22
22
8
8
1
2
3
4
21
21
9
9
2
20
10
10
20
CS
2-4 DECODING
OSC
R6
1
19
19
11
(74HC139)
CS
C3
2
SCLK
DATA
CS
18
17
16
15
14
13
12
NC = NO CONNECT
3
CS
C4
R5
V
DGND
V
DIR
NULL
OVR
4
DD
SS
R7
DEMODOUT
V
V
DD
SS
0V
+5V
–5V
0V
AD2S93
A0
A1