PCF85102C-2T PHILIPS [NXP Semiconductors], PCF85102C-2T Datasheet
![no-image](/images/no-image-200.jpg)
PCF85102C-2T
Available stocks
Related parts for PCF85102C-2T
PCF85102C-2T Summary of contents
Page 1
... DATA SHEET PCF85102C-2; PCF85103C-2 256 8-bit CMOS EEPROMs with 2 I C-bus interface Product specification File under Integrated Circuits, IC12 INTEGRATED CIRCUITS 2000 Feb 15 ...
Page 2
... CMOS EEPROMs with 2 I C-bus interface CONTENTS 1 FEATURES 2 GENERAL DESCRIPTION 3 QUICK REFERENCE DATA 4 ORDERING INFORMATION 5 DEVICE SELECTION 6 BLOCK DIAGRAM 7 PINNING 7.1 Pin description PCF85102C-2 7.2 Pin description PCF85103C C-BUS PROTOCOL 8.1 Bus conditions 8.2 Data transfer 8.3 Device addressing 8.3.1 Remark 8.4 Write operations 8.4.1 Byte/word write 8.4.2 Page write 8 ...
Page 3
... DDstb 2000 Feb 15 PCF85102C-2; PCF85103C-2 2 GENERAL DESCRIPTION The PCF85102C-2 and PCF85103C-2 (further referred to as PCF8510xC-2) are 2 kbits (256 Electrically Erasable Programmable Read Only Memories (EEPROMs). Power consumption is low due to the full CMOS technology used. The programming voltage is generated on-chip, using a voltage multiplier. ...
Page 4
... Philips Semiconductors 256 8-bit CMOS EEPROMs with 2 I C-bus interface 4 ORDERING INFORMATION TYPE NUMBER NAME PCF85102C-2P DIP8 PCF85103C-2P PCF85102C-2T SO8 PCF85103C-2T 5 DEVICE SELECTION Table 1 Device selection code SELECTION (1) Bit b7 PCF85102-C 1 PCF85103-C 0 Note 1. The Most Significant Bit (MSB) ‘b7’ is sent first. ...
Page 5
... ADDRESS SHIFT SWITCH REGISTER TEST MODE DECODER 1 A0 POWER-ON-RESET n.c. The pin numbers in this block diagram refer to the PCF85102C-2. For PCF85103C-2, please see Chapter C-BUS CONTROL LOGIC ADDRESS BYTE HIGH COUNTER REGISTER 3 BYTE 4 ADDRESS EEPROM LATCH ...
Page 6
... SCL 6 serial clock input (I n.c. 7 not connected V 8 positive supply voltage DD 2000 Feb 15 handbook, halfpage 2 C-bus) 2 C-bus) Fig.2 Pin configuration PCF85102C-2. handbook, halfpage 2 C-bus) 2 C-bus) Fig.3 Pin configuration PCF85103C-2. 6 Product specification PCF85102C-2; PCF85103C n.c. ...
Page 7
... STOP condition. The number of the data bytes, transferred between the START and STOP conditions is limited to seven bytes in the E/W mode and eight bytes in the page E/W mode. 2000 Feb 15 PCF85102C-2; PCF85103C-2 Data transfer is unlimited in the read mode. The information is transmitted in bytes and each receiver acknowledges with a ninth bit. 2 ...
Page 8
... The four MSBs of the slave address are the device type identifier (see Fig.4 and Fig.5). For the PCF85102C-2, this is fixed to ‘1010’, for the PCF85103C-2 to ‘0010’. The next three significant bits address a particular device or memory page (page = 256 bytes of memory) ...
Page 9
... A A WORD ADDRESS R/W acknowledge from slave DATA N WORD ADDRESS A Fig.7 Page write operation; eight bytes. 9 Product specification PCF85102C-2; PCF85103C-2 acknowledge acknowledge from slave from slave DATA A DATA auto increment auto increment word address word address acknowledge acknowledge ...
Page 10
... EEPROM slave receiver becomes slave transmitter acknowledge acknowledge from slave from master 1 A DATA n bytes R/W auto increment word address 10 Product specification PCF85102C-2; PCF85103C-2 R EMARK acknowledge acknowledge from slave from master DATA bytes R/W auto increment word address DATA ...
Page 11
... SCL amb 11 Product specification PCF85102C-2; PCF85103C-2 MIN. MAX. 0.3 +6.5 V 0.8 +6 +150 40 +85 MIN. MAX. 2.5 6.0 60 200 0.6 2.0 3.5 10 0.8 +0.3V DD 0.7V 6 100 7 0.8 +0 ...
Page 12
... E/W cycle time E/W Endurance N E/W cycle per byte E/W 2000 Feb see Fig.10; unless otherwise specified PARAMETER CONDITIONS internal oscillator +85 C amb amb 12 Product specification PCF85102C-2; PCF85103C-2 CONDITIONS MIN. 0 100 4.7 4.0 4.7 4.0 repeated start 4.7 5 note 1 0 250 1 300 4 MIN. TYP. ...
Page 13
Acrobat reader. white to force landscape pages to be ... SDA t BUF t LOW SCL HD;STA ...
Page 14
... scale ( 0.53 1.07 0.36 9.8 0.38 0.89 0.23 9.2 0.021 0.042 0.014 0.39 0.015 0.035 0.009 0.36 REFERENCES JEDEC EIAJ MO-001 SC-504-8 14 PCF85102C-2; PCF85103C ( 6.48 3.60 8.25 2.54 7.62 6.20 3.05 7.80 0.26 0.14 0.32 0.10 0.30 0.24 0.12 0.31 EUROPEAN PROJECTION Product specification SOT97-1 ( max. ...
Page 15
... 0.49 0.25 5.0 4.0 6.2 1.27 0.36 0.19 4.8 3.8 5.8 0.019 0.0100 0.20 0.16 0.244 0.050 0.014 0.0075 0.19 0.15 0.228 REFERENCES JEDEC EIAJ MS-012 15 PCF85102C-2; PCF85103C detail 1.0 0.7 1.05 0.25 0.25 0.4 0.6 0.039 0.028 0.041 0.01 0.01 0.016 0.024 EUROPEAN PROJECTION Product specification ...
Page 16
... Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. 2000 Feb 15 PCF85102C-2; PCF85103C-2 Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. 14.3.2 ...
Page 17
... Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2000 Feb 15 PCF85102C-2; PCF85103C-2 PACKAGE suitable not suitable ...
Page 18
... Philips. This specification can be ordered using the code 9398 393 40011. 2000 Feb 15 C COMPONENTS 2 C components conveys a license under the Philips’ system provided the system conforms to the I 18 Product specification PCF85102C-2; PCF85103C patent to use the 2 C specification defined by ...
Page 19
... Philips Semiconductors 256 8-bit CMOS EEPROMs with 2 I C-bus interface 2000 Feb 15 PCF85102C-2; PCF85103C-2 NOTES 19 Product specification ...
Page 20
Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + 101 ...