PCA8514T PHILIPS [NXP Semiconductors], PCA8514T Datasheet - Page 7

• Manufacturer Part Number: PCA8514T
• Description: Stand-alone OSD
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
6
The PCA8514 has two means by which it can
communicate with a microcontroller: a fast I
interface and a High-speed serial interface. Selection of
either interface is achieved via pin 15, HIO/I
HIO/I
HIO/I
The PCA8514 is programmed by a series of commands
sent via one of these interfaces. There are 16 commands;
each command selecting different functions of the
PCA8514. The 16 commands are described in detail in
Chapter 9.
6.1
The I
(HIO/I
I
400 kHz. The PCA8514 operates in the slave receiver
mode and therefore in normal operation is ‘write only’ from
the master device.
The format of the data streams sent via the I
interface is shown in Fig.3. The first data byte is the slave
address 1011 101X
always a logic 0, except in the Test mode when it could be
a logic 1. Subsequent data bytes contain the commands
for control of the device. Upon the successful reception of
a complete data byte by the shift register, an Acknowledge
bit is sent. A STOP condition terminates the data transfer
operation.
The I
a slave address call) by the following conditions:
Under both these conditions the data held in the shift
register is abandoned.
6.1.1
The maximum I
PCA8514 can receive is 400 kHz. However, if the data
byte being transmitted is for display RAM then internal
synchronization of the write operation from the shift
register to the display RAM location is necessary. This will
reduce the maximum transmission speed.
1995 Nov 27
2
C-bus protocol; the maximum transmission rate being
After a master reset
After a bus error has been detected on the I
interface.
Stand-alone OSD
SERIAL I/O
2
2
2
2
2
C-bus interface is reset to its initial state (waiting for
C-bus serial interface is selected by driving pin 15
C is LOW, the HIO serial interface is selected. When
C is HIGH, the I
I
C) HIGH. Data transmission conforms to the fast
2
C-bus serial interface
M
AXIMUM SPEED OF THE
2
C-bus transmission rate that the
b
. The last bit of the slave address is
2
C-bus serial interface is selected.
I
2
C-
BUS
2
2
2
C-bus serial
C. When
C-bus
2
C-bus
7
The synchronization process is carried out by on-chip
hardware and takes place during the HSYNC retrace
period when VSYNC is inactive. The I
pulled LOW if a complete display RAM data byte is
received before HSYNC becomes active. The I
clock will be released when HSYNC becomes active and
then the contents of the shift register will be written into the
display RAM location.
6.2
The High-speed serial interface is selected when pin 15
(HIO/I
has a 3-wire communication protocol; the maximum
transmission rate being 1 MHz. The interface protocol is
illustrated in Fig.4 and described below.
1. Pin 14 (E) the chip enable pin is driven HIGH. This
2. On the first HIGH-to-LOW transition of SCLK after the
3. On the following LOW-to-HIGH transition of SCLK, the
4. On the next HIGH-to-LOW transition of SCLK the
5. The operation specified in step 4 above is repeated
6. Providing the chip enable signal remains HIGH, a
The following points should be noted:
If the chip enable signal is pulled LOW at any time the
shift operation in progress is stopped and the HIO slave
receiver is disabled
The rising edge of the chip enable signal resets the HIO
slave receiver.
LOW-to-HIGH transition clears the shift register and
resets the serial input circuit.
interface has been enabled, the first data bit (D0) must
be present at the SIN pin.
first data bit (D0) will be latched into the shift register.
second data bit (D1) must be present at the SIN pin.
Data bit (D1) will be latched into the shift register on
the following LOW-to-HIGH transition of SCLK.
another 6 times, thus loading the shift register with a
complete data byte. This data byte is then transferred
to the command interpreter which takes the
appropriate action.
2nd data byte can be transferred. The 1st data bit of
the next data transfer takes place on the falling edge
of the SCLK signal.
2
C) is pulled LOW. The High-speed serial interface
High-speed serial interface (HIO)
Product specification
2
C-bus clock is
PCA8514
2
C-bus