PCA8565BS NXP [NXP Semiconductors], PCA8565BS Datasheet - Page 7
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PCA8565BS
Manufacturer Part Number
PCA8565BS
Description
Real time clock/calendar
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA8565BS.pdf
(39 pages)
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NXP Semiconductors
PCA8565_2
Product data sheet
9.2.1 Register Control_1
9.2.2 Register Control_2
9.2 Control registers
Table 5.
[1]
[2]
Table 6.
[1]
[2]
Bit
7
6
5
4
3
2 to 0 N
Bit
7 to 5 N
4
3
2
1
0
Default value.
Bits labeled as N should always be written with logic 0.
Bits labeled as N should always be written with logic 0.
Default value.
Symbol
TEST1
N
STOP
N
TESTC
Symbol
TI_TP
AF
TF
AIE
TIE
Register Control_1 (address 00h) bits description
Register Control_2 (address 01h) bits description
Rev. 02 — 16 June 2009
Value
0
1
0
0
1
0
0
1
000
Value
000
0
1
0
1
0
1
0
1
0
1
[1]
[2]
[1]
[2]
[1]
[2]
[2]
[2]
[2]
[2]
[2]
[1]
Description
normal mode
EXT_CLK test mode
default value
RTC source clock runs
default value
power-on reset override facility is disabled;
power-on reset override may be enabled
default value
Description
default value
INT is active when TF is active (subject to the status of
TIE)
INT pulses active according to
status of TIE);
alarm flag inactive
alarm flag active
timer flag inactive
timer flag active
alarm interrupt disabled
alarm interrupt enabled
timer interrupt disabled
timer interrupt enabled
all RTC divider chain flip-flops are asynchronously set to
logic 0;
the RTC clock is stopped (CLKOUT at 32.768 kHz is still
available)
set to logic 0 for normal operation
Remark: note that if AF and AIE are active then INT will
be permanently active
Real time clock/calendar
Table 26
PCA8565
© NXP B.V. 2009. All rights reserved.
(subject to the
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