M41T00AUDD1E STMICROELECTRONICS [STMicroelectronics], M41T00AUDD1E Datasheet - Page 33

• Manufacturer Part Number: M41T00AUDD1E
• Description: Serial real-time clock with audio
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

8
Table 8.
1. State of other control bits undefined
2. UC = unchanged
Initial
power-up
Subsequent
power-up
(with
battery
back-up)
Condition
(1)
Initial conditions
The first time the M41T00AUD is powered up, some of its registers will automatically have
their bits set to pre-determined levels as depicted in the
set to benign levels to ensure predictable operation of the device.
ST, the stop bit, is a 0 at first power up thus enabling the oscillator to run without need of
user intervention. On subsequent power ups, it is not altered by the device and remains at
the last value programmed by the user. All other bits listed as unchanged (UC) in the table
behave similarly during power cycles.
The HT or halt bit is always set to 1 thus halting updates of the transfer buffer registers. The
user must write it to 0 to allow updates to resume.
The discrete output function available on the IRQ/FT/OUT pin is set to 1. This is an open
drain output, and thus a 1 represents a high impedance condition.
FT or frequency test is always disabled on power ups. The OF or oscillator fail bit will always
be 1 on the first power up since the oscillator is always off prior to the first application of V
The trickle charger is always turned completely off after any power up. The bits affecting it
are set to levels which keep all the trickle charge switches open. Both TCH2 and TCFE are
0 which opens their corresponding switches. TCHE3:TCHE0 are set to Ah, which is the
exact opposite of the value (5) required to close the corresponding switch.
On first power up, the tone selects bits, /256/512 and TONE, are set to select the 512 hertz
tone, but have the function disabled (see
/256/512 select bit remains unchanged, but TONE is always cleared. Furthermore, the
MUTE bit is always set to MUTE on all power ups, disabling all audio.
The four-bit audio gain value is always set to the lowest setting (0) on initial power up, but
remains unaffected by subsequent power cycles.
The 5-bit calibration register and its associated sign bit are set to 0 on initial power up thus
resulting in no correction applied to the timekeeping operation. On subsequent power ups,
the contents are not altered.
Initial values
UC
ST
On
0
(2)
HT OUT FT OF OFIE
1
1
UC
1
0
0
UC
1
Off
UC
0
TCHE
3:0
Off
Off
Ah
Ah
TCH2 TCFE
Off
Off
Section
0
0
Off
Off
0
0
7). On subsequent power ups, the
/256/
512
512
UC
1
Table
TONE MUTE GAIN
Off
Off
0
0
5. Typically, these values are
MUTE
MUTE
1
1
-33dB
UC
0
bration
Cali-
UC
0
33/44
CC
.