74LVT534D PHILIPS [NXP Semiconductors], 74LVT534D Datasheet - Page 2

• Manufacturer Part Number: 74LVT534D
• Description: 3.3V Octal D-type flip-flop; inverting 3-State
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
ORDERING INFORMATION
PIN CONFIGURATION
20-Pin Plastic SOL
20-Pin Plastic SSOP Type II
20-Pin Plastic TSSOP Type I
1998 Feb 19
3-State outputs for bus interfacing
Common output enable
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
No bus current loading when output is tied to 5V bus
Power-up 3-State
Power-up reset
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
3.3V Octal D-type flip-flop, inverting (3-State)
SYMBOL
C
I
t
t
C
PLH
PHL
CCZ
OUT
IN
PACKAGES
GND
Propagation delay
CP to Qn
Input capacitance
Output capacitance
Total supply current
OE
Q0
Q1
Q2
Q3
D0
D1
D2
D3
10
1
2
3
4
5
6
7
8
9
PARAMETER
SA00161
TEMPERATURE RANGE
20
19
18
17
16
15
14
13
12
11
V
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
CC
C
V
V
Outputs disabled;
V
Outputs disabled;
V
L
CC
I
I/O
CC
OUTSIDE NORTH AMERICA
= 0V or 3.0V
= 50pF;
= 0V or 3.0V
= 3.3V
= 3.6V
2
T
DESCRIPTION
The LVT534 is a high-performance BiCMOS product designed for
V
This device is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE) control
gates. The state of each D input (one set-up time before the
Low-to-High clock transition) is transferred to the corresponding
flip-flop’s Q output.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-Low Output Enable (OE) controls all eight 3-State buffers
independent of the clock operation.
When OE is Low, the stored data appears at the outputs. When OE
is High, the outputs are in the High-impedance “off” state, which
means they will neither drive nor load the bus.
LOGIC SYMBOL
74LVT534 PW
74LVT534 DB
amb
74LVT534 D
CC
operation at 3.3V.
CONDITIONS
= 25 C; GND = 0V
11
1
Q0 Q1 Q2
D0 D1 D2 D3
CP
OE
3
2
5
4
NORTH AMERICA
74LVT534PW DH
7
6
74LVT534 DB
74LVT534 D
Q3
8
9
Q4 Q5 Q6
D4 D5 D6 D7
13
12
14
15
TYPICAL
0.13
17
16
3.0
3.5
SA00162
4
7
Product specification
74LVT534
Q7
18
19
DWG NUMBER
853-1855 18988
SOT163-1
SOT339-1
SOT360-1
UNIT
mA
pF
pF
ns