AD9865CHIPS AD [Analog Devices], AD9865CHIPS Datasheet

AD9865CHIPS

Manufacturer Part Number

AD9865CHIPS

Description

Broadband Modem Mixed-Signal Front End

Manufacturer

AD [Analog Devices]

Datasheet

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FEATURES

Low cost 3.3 V CMOS MxFE

10-bit D/A converter

Integrated 23 dBm line driver with 19.5 dB gain control

10-bit, 80 MSPS A/D converter

−12 dB to +48 dB low noise RxPGA (< 3.0 nV/rtHz)

Third order, programmable low-pass filter

Flexible digital data path interface

Various power-down/reduction modes

Internal clock multiplier (PLL)

2 auxiliary programmable clock outputs

Available in 64-lead chip scale package or bare die

APPLICATIONS

Powerline networking

VDSL and HPNA

GENERAL DESCRIPTION

The AD9865 is a mixed-signal front end (MxFE) IC for

transceiver applications requiring Tx and Rx path functionality

with data rates up to 80 MSPS. Its flexible digital interface,

power saving modes, and high Tx-to-Rx isolation make it well

suited for half- and full-duplex applications. The digital inter-

face is extremely flexible allowing simple interfaces to digital

back ends that support half- or full-duplex data transfers, thus

often allowing the AD9865 to replace discrete ADC and DAC

solutions. Power saving modes include the ability to reduce

power consumption of individual functional blocks, or to power

down unused blocks in half-duplex applications. A serial port

interface (SPI®) allows software programming of the various

functional blocks. An on-chip PLL clock multiplier and

synthesizer provide all the required internal clocks, as well as

two external clocks from a single crystal or clock source.

The Tx signal path consists of a bypassable 2×/4× low-pass

interpolation filter, a 10-bit TxDAC, and a line driver. The

transmit path signal bandwidth can be as high as 34 MHz at an

input data rate of 80 MSPS. The TxDAC provides differential

current outputs that can be steered directly to an external load

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

2×/4× interpolation filter

200 MSPS DAC update rate

Half- and full-duplex operation

Backward-compatible with AD9975 and AD9875

for broadband modems

Broadband Modem Mixed-Signal Front End

TXEN/SYNC

or to an internal low distortion current amplifier. The current

amplifier (IAMP) can be configured as a current- or voltage-

mode line driver (with two external npn transistors) capable of

delivering in excess of 23 dBm peak signal power. Tx power can

be digitally controlled over a 19.5 dB range in 0.5 dB steps.

The receive path consists of a programmable amplifier

(RxPGA), a tunable low-pass filter (LPF), and a 10-bit ADC.

The low noise RxPGA has a programmable gain range of

−12 dB to +48 dB in 1 dB steps. Its input referred noise is less

than 3 nV/rtHz for gain settings beyond 36 dB. The receive path

LPF cutoff frequency can be set over a 15 MHz to 35 MHz

range or simply bypassed. The 10-bit ADC achieves excellent

dynamic performance over a 5 MSPS to 80 MSPS span. Both

the RxPGA and the ADC offer scalable power consumption

allowing power/performance optimization.

The AD9865 provides a highly integrated solution for many

broadband modems. It is available in a space saving 64-pin chip

scale package and is specified over the commercial (−40°C to

+85°C) temperature range.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.326.8703

ADIO[9:4]/

ADIO[3:0]/

RXE/SYNC

PWR DWN

AGC[5:0]

Rx[5:0]

Tx[5:0]

RXCLK

TXCLK

MODE

SPI

AD9865

FUNCTIONAL BLOCK DIAGRAM

CONTROL

80MSPS

2-4X

ADC

0 TO 6dB

∆ = 1dB

Figure 1.

CLK

SYN.

TxDAC

0 TO –7.5dB

– 6 TO 18dB

∆ = 6dB

MULTIPLIER

2-POLE

LPF

CLK

–6 TO 24dB

∆ = 6dB

www.analog.com

0 TO –12dB

AD9865

1-POLE

IAMP

LPF

IOUT_G+

IOUT_N+

IOUT_N–

IOUT_G–

CLKOUT_1

CLKOUT_2

OSCIN

XTAL

RX+

RX–

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