AD9865CHIPS AD [Analog Devices], AD9865CHIPS Datasheet - Page 8

• Manufacturer Part Number: AD9865CHIPS
• Description: Broadband Modem Mixed-Signal Front End
• Manufacturer: AD [Analog Devices]

AD9865
FULL-DUPLEX DATA INTERFACE (Tx AND Rx PORT) TIMING SPECIFICATIONS
AVDD = 3.3 V ± 5%, DVDD = CLKVDD = DRVDD = 3.3 V ± 10%, unless otherwise noted.
Table 7.
Parameter
Tx PATH INTERFACE (See Figure 53)
Rx PATH INTERFACE
1
EXPLANATION OF TEST LEVELS
I
II
III
IV
V
VI
C
LOAD
Input Nibble Rate (2× Interpolation)
Input Nibble Rate (4× Interpolation)
Tx Data Setup Time (t
Tx Data Hold Time (t
Output Nibble Rate
Rx Data Valid Time (t
Rx Data Hold Time (t
=5 pF for digital data outputs.
100% production tested.
100% production tested at 25°C and guaranteed by design and characterization at specified temperatures.
Sample tested only.
Parameter is guaranteed by design and characterization testing.
Parameter is a typical value only.
100% production tested at 25°C and guaranteed by design and characterization for industrial temperature range.
1
(See Figure 54)
DH
DV
DH
DS
)
)
)
)
Temp
Full
Full
Full
Full
Full
Full
Full
Rev. A | Page 8 of 48
Test Level
II
II
II
II
II
II
II
Min
20
10
2.5
1.5
10
3
0
Typ
Max
160
100
160
Unit
MSPS
MSPS
ns
ns
MSPS
ns
ns