PCA9510ADP NXP [NXP Semiconductors], PCA9510ADP Datasheet
PCA9510ADP
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PCA9510ADP Summary of contents
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PCA9510A Hot swappable I Rev. 04 — 18 August 2009 1. General description The PCA9510A is a hot swappable I insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from being connected ...
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... A current source on SCLIN and SDAIN for PICMG applications 5. Ordering information Table 2. Ordering information +85 C. amb Type number Topside Package mark Name PCA9510AD PA9510A SO8 PCA9510ADP 9510A TSSOP8 [1] Also known as MSOP8. PCA9510A_4 Product data sheet Hot swappable I PCA9510A PCA9511A PCA9512A PCA9513A PCA9514A yes = 0 V yes ...
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NXP Semiconductors 6. Block diagram PCA9510A SDAIN CONNECT 100 k RCH1 100 k RCH2 SCLIN CONNECT 0.55V / CC 0.45V CC UVLO 100 s ENABLE DELAY Fig 1. Block diagram of PCA9510A PCA9510A_4 Product data sheet Hot swappable I BACKPLANE-TO-CARD ...
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... SDA bus on the backplane 7 serial data output to and from the SDA bus on the card 8 power supply Rev. 04 — 18 August 2009 PCA9510A 2 Hot swappable I C-bus and SMBus bus buffer ENABLE 1 SCLOUT 2 PCA9510ADP SCLIN 3 GND 4 002aab783 Fig 3. Pin configuration for TSSOP8 SDAOUT 6 ...
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NXP Semiconductors 8. Functional description Refer to 8.1 Start-up An undervoltage and initialization circuit holds the parts in a disconnected state which presents high-impedance to all SDAn and SCLn pins during power-up. A LOW on the ENABLE pin also forces ...
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NXP Semiconductors 8.3 Maximum number of devices in series Each buffer adds about 0.1 V dynamic level offset with the offset larger at higher temperatures. Maximum offset (V level at the signal origination end (master) is dependent ...
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NXP Semiconductors 8.4 Propagation delays The delay for a rising edge is determined by the combined pull-up current from the bus resistors and the rise time accelerator current source and the effective capacitance on the lines. If the pull-up currents ...
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NXP Semiconductors (1) Unshaded area indicates recommended pull-up. Fig (1) Unshaded area indicates recommended pull-up. Fig 6. 8.8 Hot swapping and capacitance buffering application Figure 7 advantage of both its hot swapping ...
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NXP Semiconductors See Application Note AN10160, ‘Hot Swap Bus Buffer’ for more information on applications and technical assistance. BACKPLANE CONNECTOR BACKPLANE BD_SEL SDA SCL Remark: The PCA9510A can be used in any ...
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NXP Semiconductors BACKPLANE CONNECTOR BACKPLANE SDA SCL Fig 8. Hot swapping multiple I/O cards into a backplane using the PCA9510A in a PCI system ...
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NXP Semiconductors Fig 10. System with disparate V 9. Application design-in information Fig 11. Typical application 10. Limiting values Table 4. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol oper T stg ...
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NXP Semiconductors 11. Characteristics Table 5. Characteristics +85 C; unless otherwise specified. CC amb Symbol Parameter Power supply V supply voltage CC I supply current CC I Shut-down ...
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NXP Semiconductors Table 5. Characteristics …continued +85 C; unless otherwise specified. CC amb Symbol Parameter Input-output connection V offset voltage offset t LOW to HIGH PLH propagation delay ...
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NXP Semiconductors 11.1 Typical performance characteristics 3 (mA) 3.3 2.9 2.5 40 +25 Fig 12. I versus temperature CC Fig 14. Connection circuitry V PCA9510A_4 Product data sheet 002aab588 PHL (ns) 3.3 ...
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NXP Semiconductors 11.2 Timing diagrams SDAn/SCLn ENABLE READY Fig 15. Timing for idle(READY) SDAIN SCLIN SCLOUT SDAOUT ENABLE READY t is only applicable after the t stp(READY) Fig 16. t that can occur after t stp(READY) ...
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NXP Semiconductors 12. Test information R = load resistor load capacitance includes jig and probe capacitance termination resistance should be equal to the output impedance Z T Fig 18. Test circuitry for switching times ...
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NXP Semiconductors 13. Package outline SO8: plastic small outline package; 8 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT ...
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NXP Semiconductors TSSOP8: plastic thin shrink small outline package; 8 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 ...
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NXP Semiconductors 14. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 14.1 Introduction ...
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NXP Semiconductors 14.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including ...
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NXP Semiconductors Fig 21. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 15. Abbreviations Table 8. Acronym AdvancedTCA CDM cPCI DUT ESD HBM 2 ...
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NXP Semiconductors 16. Revision history Table 9. Revision history Document ID Release date PCA9510A_4 20090818 • Modifications: Section 8.7 “Resistor pull-up value “... always choose R maximum.” to “always choose 3.6 V maximum.” CC • Updated – ...
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NXP Semiconductors 17. Legal information 17.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...
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NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...