TLV320AIC3105_08 BURR-BROWN [Burr-Brown Corporation], TLV320AIC3105_08 Datasheet - Page 28

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TLV320AIC3105_08

Manufacturer Part Number
TLV320AIC3105_08
Description
LOW-POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
Manufacturer
BURR-BROWN [Burr-Brown Corporation]
Datasheet
TLV320AIC3105
SLAS513A – FEBRUARY 2007 – REVISED JULY 2007
28
Where Q = 2, 3,
NOTE – when NDAC = 1.5, 2.5, 3.5, 4.5, or 5.5, odd values of Q are not allowed. In this mode, MCLK can be as
high as 50 MHz, and f
be the same as the NADC setting. The NDAC ratio is set on page 0, register 2. The NDAC is set equal to NADC
by setting the value of bits D7–D4 equal to that of bits D3–D0.)
When the PLL is enabled,
P, R, J, and D are register programmable. J is the integer portion of K (the numbers to the left of the decimal
point), while D is the fractional portion of K (the numbers to the right of the decimal point, assuming four digits of
precision).
Examples:
When the PLL is enabled and D = 0000, the following conditions must be satisfied to meet specified
performance:
When the PLL is enabled and D 0000, the following conditions must be satisfied to meet specified performance:
Example:
Example:
The table below lists several example cases of typical MCLK rates and how to program the PLL to achieve f
= 44.1 kHz or 48 kHz.
f
MCLK (MHz)
2.8224
5.6448
12
13
16
19.2
19.68
S(ref)
CLKDIV_IN can be MCLK or BCLK, selected by register 102, bits D7–D6.
f
If K = 8.5, then J = 8, D = 5000
If K = 7.12, then J = 7, D = 1200
If K = 14.03, then J = 14, D = 0300
If K = 6.0004, then J = 6, D = 0004
2 MHz
80 MHz
4
10 MHz
80 MHz
4
R = 1
MCLK = 12 MHz and f
Select P = 1, R = 1, K = 7.5264, which results in J = 7, D = 5264
MCLK = 12 MHz and f
Select P = 1, R = 1, K = 8.192, which results in J = 8, D = 1920
S(ref)
= 44.1 kHz
J
J
P = 1, 2, 3, , 8
R = 1, 2,
K = J.D
J = 1, 2, 3,
D = 0000, 0001, 0002, 0003,
PLLCLK_IN can be MCLK or BCLK, selected by page 0, register 102, bits D5–D4
= (PLLCLK_IN
55
11
( PLLCLK_IN/P )
(PLLCLK _IN
PLLCLK _IN/P
PLLCLK _IN
, 17
, 16
, 63
S(ref)
P
1
1
1
1
1
1
1
K
S(ref)
S(ref)
should fall within 39 kHz to 53 kHz. (In the TLV320AIC3105, the NDAC setting must
K
K
R)/(2048
= 44.1 kHz
= 48 kHz
20 MHz
20 MHz
R/P
R/P )
R
1
1
1
1
1
1
1
, 9998, 9999
110 MHz
P), where
110 MHz
OVERVIEW (continued)
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32
16
J
7
6
5
4
4
5264
9474
6448
7040
5893
D
0
0
ACHIEVED f
44,099.71
44,100.3
44,100
44,100
44,100
44,100
44,100
S(ref)
% ERROR
www.ti.com
–0.0007
0.0007
0
0
0
0
0
S(ref)

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