TLV320AIC3105_08 BURR-BROWN [Burr-Brown Corporation], TLV320AIC3105_08 Datasheet - Page 56

• Manufacturer Part Number: TLV320AIC3105_08
• Description: LOW-POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
• Manufacturer: BURR-BROWN [Burr-Brown Corporation]

TLV320AIC3105
SLAS513A – FEBRUARY 2007 – REVISED JULY 2007
56
D6–D3
D2–D0
D7–D6
D5–D3
D2–D0
D6–D3
D1–D0
BIT
BIT
D7
BIT
D7
D2
WRITE
WRITE
READ/
READ/
R/W
R/W
R/W
R
R
R
WRITE
READ/
R/W
R/W
R/W
R
RESET
VALUE
RESET
VALUE
1111
XXX
RESET
VALUE
000
000
00
1111
0
00
0
0
Page 0/Register 23: LINE2R to Right ADC Control Register
Page 0/Register 24: LINE1L to Right ADC Control Register
Reserved
LINE2R Input Level Control for Right ADC PGA Mix
Setting the input level control to a gain below automatically connects LINE2R to the right ADC PGA mix.
0000: Input level control gain = 0 dB
0001: Input level control gain = –1.5 dB
0010: Input level control gain = –3 dB
0011: Input level control gain = –4.5 dB
0100: Input level control gain = –6 dB
0101: Input level control gain = –7.5 dB
0110: Input level control gain = –9 dB
0111: Input level control gain = –10.5 dB
1000: Input level control gain = –12 dB
1001–1110: Reserved. Do not write these sequences to these register bits.
1111: LINE2R is not connected to the right ADC PGA.
Right ADC Channel Weak Common-Mode Bias Control
0:
1:
Reserved. Write only zeros to these register bits
Reserved
LINE1L Input Level Control for Right ADC PGA Mix
Setting the input level control to a gain below automatically connects LINE1L to the right ADC PGA mix.
0000: Input level control gain = 0 dB
0001: Input level control gain = –1.5 dB
0010: Input level control gain = –3 dB
0011: Input level control gain = –4.5 dB
0100: Input level control gain = –6 dB
0101: Input level control gain = –7.5 dB
0110: Input level control gain = –9 dB
0111: Input level control gain = –10.5 dB
1000: Input level control gain = –12 dB
1001–1110: Reserved. Do not write these sequences to these register bits.
1111: LINE1L is not connected to the right ADC PGA.
Reserved. Write only zeros to these register bits.
MICBIAS Level Control
00: MICBIAS output is powered down.
01: MICBIAS output is powered to 2 V.
10: MICBIAS output is powered to 2.5 V.
11: MICBIAS output is connected to AVDD
Reserved. Write only zeros to these bits.
Reserved. Write only zeros to these bits.
Page 0/Register 25: MICBIAS Control Register
Right ADC channel unselected inputs are not biased weakly to the ADC common-mode voltage.
Right ADC channel unselected inputs are biased weakly to the ADC common-mode voltage.
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