TLV320AIC3105_08 BURR-BROWN [Burr-Brown Corporation], TLV320AIC3105_08 Datasheet - Page 79

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TLV320AIC3105_08

Manufacturer Part Number
TLV320AIC3105_08
Description
LOW-POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
Manufacturer
BURR-BROWN [Burr-Brown Corporation]
Datasheet
(1) Based on the setting above, if BOTH LINE1 and LINE2 inputs are routed to the output at the same time, then the two switches used for
D7–D6
D5–D0
D7–D0
D7–D1
BIT
BIT
BIT
BIT
D7
D6
D5
D4
D3
D2
D1
D0
D0
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the connection short the two input signals together on the output pins. The shorting resistance between the two input pins is two times
the bypass switch resistance (Rdson). In general, this condition of shorting should be avoided, as higher drive currents are likely to
occur on the circuitry that feeds these two input pins of this device.
Page 0/Register 108: Passive Analog Signal Bypass Selection During Power Down Register
WRITE
WRITE
WRITE
WRITE
READ/
READ/
READ/
READ/
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
X
0000 0000
0000 000
00 0000
RESET
VALUE
RESET
VALUE
RESET
VALUE
RESET
VALUE
00
0
0
0
0
0
0
0
0
0
Page 0/Register 109: DAC Quiescent Current Adjustment Register
Reserved. Only write a 0 to this bit.
LINE2RP Path Selection
0: Normal Signal Path
1: Signal is routed by a switch to RIGHT_LOP
Reserved. Only write a 0 to this bit.
LINE1RP Path Selection
0: Normal Signal Path
1: Signal is routed by a switch to RIGHT_LOP
Reserved. Only write a 0 to this bit.
LINE2LP Path Selection
0: Normal Signal Path
1: Signal is routed by a switch to LEFT_LOP
Reserved. Only write a 0 to this bit.
LINE1LP Path Selection
0: Normal Signal Path
1: Signal is routed by a switch to LEFT_LOP
DAC Current Adjustment
00: Default
01: 50% increase in DAC reference current
10: Reserved
11: 100% increase in DAC reference current
Reserved. Write only zeros to these register bits.
Reserved. Do not write to these registers.
Reserved. Write only zeros to these bits.
Page Select Bit
Writing zero to this bit sets page 0 as the active page for following register accesses. Writing a one to
this bit sets page 1 as the active page for following register accesses. It is recommended that the user
read this register bit back after each write, to ensure that the proper page is being accessed for future
register read/writes. This register has the same functionality on page 0 and page 1.
Page 0/Register 110–127: Reserved Registers
Page 1/Register 0: Page Select Register
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DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
SLAS513A – FEBRUARY 2007 – REVISED JULY 2007
TLV320AIC3105
(1)
79

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