PCA9544A_09 NXP [NXP Semiconductors], PCA9544A_09 Datasheet

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PCA9544A_09

Manufacturer Part Number
PCA9544A_09
Description
4-channel I2C-bus multiplexer with interrupt logic
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA9544A_09.pdf (26 pages)
1. General description
2. Features
The PCA9544A is a 1-of-4 bidirectional translating multiplexer, controlled via the I
The SCL/SDA upstream pair fans out to four SCx/SDx downstream pairs, or channels.
Only one SCx/SDx channel is selected at a time, determined by the contents of the
programmable control register. Four interrupt inputs, INT0 to INT3, one for each of the
SCx/SDx downstream pairs, are provided. One interrupt output, INT, which acts as an
AND of the four interrupt inputs, is provided.
A power-on reset function puts the registers in their default state and initializes the I
state machine with no channels selected.
The pass gates of the multiplexer are constructed such that the V
limit the maximum high voltage which will be passed by the PCA9544A. This allows the
use of different bus voltages on each SCx/SDx pair, so that 1.8 V, 2.5 V or 3.3 V parts can
communicate with 5 V parts without any additional protection. External pull-up resistors
pull the bus up to the desired voltage level for each channel. All I/O pins are 5 V tolerant.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
PCA9544A
4-channel I
Rev. 04 — 15 June 2009
1-of-4 bidirectional translating multiplexer
I
4 active LOW interrupt inputs
Active LOW interrupt output
3 address pins allowing up to 8 devices on the I
Channel selection via I
Power-up with all multiplexer channels deselected
Low R
Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
No glitch on power-up
Supports hot insertion
Low standby current
Operating power supply voltage range of 2.3 V to 5.5 V
5 V tolerant Inputs
0 Hz to 400 kHz clock frequency
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115 and 1000 V CDM per JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
Three packages offered: SO20, TSSOP20 and HVQFN20
2
C-bus interface logic; compatible with SMBus
on
switches
2
C-bus multiplexer with interrupt logic
2
C-bus
2
C-bus
DD
Product data sheet
pin can be used to
2
2
C-bus.
C-bus

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PCA9544A_09 Summary of contents

Page 1

PCA9544A 4-channel I Rev. 04 — 15 June 2009 1. General description The PCA9544A is a 1-of-4 bidirectional translating multiplexer, controlled via the I The SCL/SDA upstream pair fans out to four SCx/SDx downstream pairs, or channels. Only one SCx/SDx ...

Page 2

NXP Semiconductors 3. Ordering information Table 1. Type number PCA9544AD PCA9544APW PCA9544ABS 3.1 Ordering options Table 2. Type number PCA9544AD PCA9544APW PCA9544ABS PCA9544A_4 Product data sheet 4-channel I Ordering information Package Name Description SO20 plastic small outline package; 20 leads; ...

Page 3

NXP Semiconductors 4. Block diagram SC0 SC1 SC2 SC3 SD0 SD1 SD2 SD3 SCL SDA INT[3:0] Fig 1. PCA9544A_4 Product data sheet 4-channel I PCA9544A SWITCH CONTROL LOGIC POWER-ON RESET INPUT FILTER INTERRUPT LOGIC Block diagram ...

Page 4

NXP Semiconductors 5. Pinning information 5.1 Pinning INT0 SD0 SC0 INT1 SD1 SC1 V Fig 2. Fig 4. PCA9544A_4 Product data sheet 4-channel SDA SCL 4 17 INT ...

Page 5

NXP Semiconductors 5.2 Pin description Table 3. Symbol INT0 SD0 SC0 INT1 SD1 SC1 V SS INT2 SD2 SC2 INT3 SD3 SC3 INT SCL SDA V DD [1] HVQFN20 package supply ground is connected to both V ...

Page 6

NXP Semiconductors 6. Functional description Refer to 6.1 Device addressing Following a START condition the bus master must output the address of the slave it is accessing. The address of the PCA9544A is shown in internal pull-up resistors are incorporated ...

Page 7

NXP Semiconductors Table 4. INT3 6.3 Interrupt handling The PCA9544A provides 4 interrupt inputs, one for each channel and one open-drain interrupt output. When an interrupt is generated by any device, it will be ...

Page 8

NXP Semiconductors 6.4 Power-on reset When power is applied reset condition until V and the PCA9544A registers and I states (all zeroes), causing all the channels to be deselected. Thereafter, V lowered below 0 reset ...

Page 9

NXP Semiconductors 7. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be ...

Page 10

NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 10. System configuration 7.4 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed ...

Page 11

NXP Semiconductors 7.5 Bus transactions SDA START condition Fig 12. Write control register SDA START condition Fig 13. Read control register PCA9544A_4 Product data sheet 4-channel I slave address R/W slave address ...

Page 12

NXP Semiconductors 8. Application design-in information 2 I C-bus/SMBus master (1) If the device generating the interrupt has an open-drain output structure or can be 3-stated, Fig 14. Typical application PCA9544A_4 Product data sheet 4-channel 2.7 V ...

Page 13

NXP Semiconductors 9. Limiting values Table 6. In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to ground (V Symbol tot T stg ...

Page 14

NXP Semiconductors 10. Static characteristics Table 7. Static characteristics +85 C; unless otherwise specified. See SS amb Symbol Parameter Supply V supply voltage DD I supply current DD I ...

Page 15

NXP Semiconductors Table 8. Static characteristics +85 C; unless otherwise specified. See SS amb Symbol Parameter Supply V supply voltage DD I supply current DD I standby current stb ...

Page 16

NXP Semiconductors 11. Dynamic characteristics Table 9. Dynamic characteristics Symbol Parameter t propagation delay PD f SCL clock frequency SCL t bus free time between a STOP and BUF START condition t hold time (repeated) START HD;STA condition t LOW ...

Page 17

NXP Semiconductors SDA t BUF t LOW SCL t HD;STA P S Fig 15. Definition of timing on the I PCA9544A_4 Product data sheet 4-channel HD;DAT HIGH SU;DAT 2 C-bus Rev. 04 ...

Page 18

NXP Semiconductors 12. Package outline SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT ...

Page 19

NXP Semiconductors TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm ...

Page 20

NXP Semiconductors HVQFN20: plastic thermal enhanced very thin quad flat package; no leads; 20 terminals; body 0.85 mm terminal 1 index area terminal 1 20 index area DIMENSIONS (mm are ...

Page 21

NXP Semiconductors 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 13.1 Introduction ...

Page 22

NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including ...

Page 23

NXP Semiconductors Fig 19. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 14. Abbreviations Table 12. Acronym CDM ESD HBM I C-bus ...

Page 24

NXP Semiconductors 15. Revision history Table 13. Revision history Document ID Release date PCA9544A_4 20090615 • Modifications: Table 9 “Dynamic – Symbol t – Symbol C PCA9544A_3 20081124 PCA9544A_2 20040929 (9397 750 13931) PCA9544A_1 20040728 (9397 750 13301) PCA9544A_4 Product ...

Page 25

NXP Semiconductors 16. Legal information 16.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...

Page 26

NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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