PCA9546D PHILIPS [NXP Semiconductors], PCA9546D Datasheet - Page 5
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PCA9546D
Manufacturer Part Number
PCA9546D
Description
4-channel I2C switch with reset
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.PCA9546D.pdf
(17 pages)
Philips Semiconductors
DEVICE ADDRESSING
Following a START condition the bus master must output the
address of the slave it is accessing. The address of the PCA9546 is
shown in Figure 3. To conserve power, no internal pull-up resistors
are incorporated on the hardware selectable address pins and they
must be pulled HIGH or LOW.
The last bit of the slave address defines the operation to be
performed. When set to logic 1, a read is selected while a logic 0
selects a write operation.
CONTROL REGISTER
Following the successful acknowledgement of the slave address,
the bus master will send a byte to the PCA9546, which will be stored
in the control register. If multiple bytes are received by the
PCA9546, it will save the last byte received. This register can be
written and read via the I
2004 Sep 30
4-channel I
X
7
X
6
1
X
5
1
FIXED
Figure 4. Control register
Figure 3. Slave address
X
2
4
1
CHANNEL SELECTION BITS
C switch with reset
2
C-bus.
B3
0
3
(READ/WRITE)
A2
B2
HARDWARE SELECTABLE
2
A1 A0
B1
1
B0
0
R/W
CHANNEL 0
CHANNEL 1
CHANNEL 2
CHANNEL 3
SW01026
SW00915
5
CONTROL REGISTER DEFINITION
One or several SCx/SDx downstream pair, or channel, is selected
by the contents of the control register. This register is written after
the PCA9546 has been addressed. The 2 LSBs of the control byte
are used to determine which channel is to be selected. When a
channel is selected, the channel will become active after a stop
condition has been placed on the I
SCx/SDx lines will be in a HIGH state when the channel is made
active, so that no false conditions are generated at the time of
connection.
Table 1. Control Register; Write — Channel Selection/
Read — Channel Status
NOTE: Several channels can be enabled at the same time.
Ex: B3 = 0, B2 = 1, B1 = 1, B0 = 0, means that channel 0 and 3 are
disabled and channel 1 and 2 are enabled.
Care should be taken not to exceed the maximum bus capacity.
RESET INPUT
The RESET input is an active-LOW signal which may be used to
recover from a bus fault condition. By asserting this signal LOW for
a minimum of t
machine and will deselect all channels. The RESET input must be
connected to V
POWER-ON RESET
When power is applied to V
the PCA9546 in a reset state until V
point, the reset condition is released and the PCA9546 registers and
I
causing all the channels to be deselected.
2
D7
C state machine are initialized to their default states, all zeroes
X
X
X
X
X
X
X
X
0
D6
X
X
X
X
X
X
X
X
0
D5
X
X
X
X
X
X
X
X
WL
0
DD
, the PCA9546 will reset its registers and I
through a pull-up resistor.
D4
X
X
X
X
X
X
X
X
0
B3
X
X
X
X
X
X
0
1
0
DD
, an internal Power On Reset holds
B2
X
X
X
X
X
X
0
1
0
2
C-bus. This ensures that all
DD
B1
has reached V
X
X
0
1
X
X
X
X
0
B0
0
1
X
X
X
X
X
X
0
PCA9546
Product data sheet
Channel 0
disabled
Channel 0
enabled
Channel 1
disabled
Channel 1
enabled
Channel 2
disabled
Channel 2
enabled
Channel 3
disabled
Channel 3
enabled
No channel
selected;
power-up/reset
default state
COMMAND
POR
. At this
2
C state