PCA9620H NXP [NXP Semiconductors], PCA9620H Datasheet - Page 49

• Manufacturer Part Number: PCA9620H
• Description: Universal LCD driver for low multiplex rates
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
8. I
PCA9620
Product data sheet
2
C-bus interface characteristics
8.1 Bit transfer
8.2 START and STOP conditions
8.3 System configuration
The I
The two lines are a Serial DAta line (SDA) and a Serial CLock line (SCL). Both lines must
be connected to a positive supply via a pull-up resistor when connected to the output
stages of a device. Data transfer may be initiated only when the bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as a control signal (see
Both data and clock lines remain HIGH when the bus is not busy.
A HIGH-to-LOW change of the data line, while the clock is HIGH is defined as the START
condition (S).
A LOW-to-HIGH change of the data line while the clock is HIGH is defined as the STOP
condition (P).
The START and STOP conditions are shown in
A device generating a message is a transmitter; a device receiving a message is the
receiver. The device that controls the message is the master; and the devices which are
controlled by the master are the slaves. The system configuration is shown in
Fig 43. Bit transfer
Fig 44. Definition of START and STOP conditions
2
C-bus is for bidirectional, two-line communication between different ICs or modules.
SDA
SCL
START condition
All information provided in this document is subject to legal disclaimers.
SDA
SCL
S
Rev. 1 — 9 December 2010
data valid
data line
stable;
Figure
Universal LCD driver for low multiplex rates
allowed
change
of data
Figure
43).
44.
STOP condition
mba607
P
PCA9620
© NXP B.V. 2010. All rights reserved.
Figure
mbc622
SDA
SCL
49 of 71
45.