PCA9622BS NXP [NXP Semiconductors], PCA9622BS Datasheet

PCA9622BS

Manufacturer Part Number

PCA9622BS

Description

16-bit Fm+ I2C-bus 100 mA 40 V LED driver

Manufacturer

NXP [NXP Semiconductors]

Datasheet

1.PCA9622BS.pdf (39 pages)

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1. General description

The PCA9622 is an I

dimming and blinking 100 mA Red/Green/Blue/Amber (RGBA) LEDs. Each LED output

has its own 8-bit resolution (256 steps) ﬁxed frequency individual PWM controller that

operates at 97 kHz with a duty cycle that is adjustable from 0 % to 99.6 % to allow the

LED to be set to a speciﬁc brightness value. An additional 8-bit resolution (256 steps)

group PWM controller has both a ﬁxed frequency of 190 Hz and an adjustable frequency

between 24 Hz to once every 10.73 seconds with a duty cycle that is adjustable from 0 %

to 99.6 % that is used to either dim or blink all LEDs with the same value.

Each LED output can be off, on (no PWM control), set at its individual PWM controller

value or at both individual and group PWM controller values. The PCA9622 operates with

a supply voltage range of 2.3 V to 5.5 V and the 100 mA open-drain outputs allow

voltages up to 40 V.

The PCA9622 is one of the ﬁrst LED controller devices in a new Fast-mode Plus (Fm+)

family. Fm+ devices offer higher frequency (up to 1 MHz) and more densely populated bus

operation (up to 4000 pF).

The active LOW Output Enable input pin (OE) blinks all the LED outputs and can be used

to externally PWM the outputs, which is useful when multiple devices need to be dimmed

or blinked together without using software control.

Software programmable LED Group and three Sub Call I

deﬁned groups of PCA9622 devices to respond to a common I

for example, all red LEDs to be turned on or off at the same time or marquee chasing

effect, thus minimizing I

126 devices on the same bus.

The Software Reset (SWRST) Call allows the master to perform a reset of the PCA9622

through the I

their default state causing the outputs to be set HIGH (LED off). This allows an easy and

quick way to reconﬁgure all device registers to the same condition.

The PCA9622, PCA9625 and PCA9635 software is identical and if the PCA9622 on-chip

100 mA NAND FETs do not provide enough current or voltage to drive the LEDs, then the

PCA9635 with larger current or higher voltage external drivers can be used.

PCA9622

16-bit Fm+ I

Rev. 03 — 31 August 2009

C-bus, identical to the Power-On Reset (POR) that initializes the registers to

C-bus 100 mA 40 V LED driver

C-bus controlled 16-bit LED driver optimized for voltage switch

C-bus commands. Seven hardware address pins allow up to

C-bus addresses allow all or

C-bus address, allowing

Product data sheet

Related parts for PCA9622BS

PCA9622BS Summary of contents

Page 1

PCA9622 16-bit Fm+ I Rev. 03 — 31 August 2009 1. General description The PCA9622 dimming and blinking 100 mA Red/Green/Blue/Amber (RGBA) LEDs. Each LED output has its own 8-bit resolution (256 steps) ﬁxed frequency individual PWM ...

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NXP Semiconductors 2. Features I 16 LED drivers. Each output programmable at: N Off Programmable LED brightness N Programmable group dimming/blinking mixed with individual LED brightness I 1 MHz Fast-mode Plus compatible I on SDA output for ...

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... LED displays I LCD backlights I Keypad backlights for cellular phones or handheld devices 4. Ordering information Table 1. Ordering information Type number Topside mark [1] PCA9622BS P9622 PCA9622DR PCA9622DR [1] HVQFN32 package under development. PCA9622_3 Product data sheet Package Name Description HVQFN32 plastic thermal enhanced very thin quad ﬂat package; ...

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PCA9622 SCL INPUT FILTER SDA POWER- RESET V SS PWM REGISTER X BRIGHTNESS CONTROL 24.3 kHz 97 kHz 25 MHz OSCILLATOR OE Remark: Only one LED output shown for clarity. Fig 1. Block diagram of PCA9622 A0 A1 ...

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... Rev. 03 — 31 August 2009 PCA9622 2 16-bit Fm+ I C-bus 100 LED driver LED0 3 LED1 4 PCA9622BS LED2 LED3 7 LED4 8 Transparent top view Pin conﬁguration for HVQFN32 Description supply ground address input 0 address input 1 address input 2 ...

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NXP Semiconductors Table 2. Symbol LED9 V SS LED10 LED11 LED12 LED13 V SS LED14 LED15 SCL SDA V DD [1] HVQFN32 package supply ground is connected to both V be connected to supply ground for proper ...

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NXP Semiconductors 7. Functional description Refer to 7.1 Device addresses Following a START condition, the bus master must output the address of the slave it is accessing. There are a maximum of 128 possible programmable addresses using the 7 hardware ...

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NXP Semiconductors 7.1.2 LED All Call I • Default power-up value (ALLCALLADR register): E0h or 1110 000 • Programmable through I • At power-up, LED All Call I E0h (R E1h (R sent by ...

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NXP Semiconductors 7.2 Control register Following the successful acknowledgement of the slave address, LED All Call address or LED Sub Call address, the bus master will send a byte to the PCA9622, which will be stored in the Control register. ...

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NXP Semiconductors AI[2:0] = 110 is used when the LED drivers must be globally programmed with different settings during the same I blinking change. AI[2:0] = 111 is used when individual and global changes must be performed during the 2 ...

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NXP Semiconductors [1][2] Table 4. Register summary Register number (hex [1] Only D[4: 0000 to 1 1011 are allowed and will be acknowledged. D[4: 1100 to 1 ...

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NXP Semiconductors 7.3.2 Mode register 2, MODE2 Table 6. MODE2 - Mode register 2 (address 01h) bit description Legend: * default value. Bit Symbol Access 7 - read only 6 - read only 5 DMBLNK R/W 4 INVRT R/W 3 ...

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NXP Semiconductors 7.3.4 GRPPWM, group duty cycle control Table 8. Legend: * default value Address 12h When DMBLNK bit (MODE2 register) is programmed with logic 0, a 190 Hz ﬁxed frequency signal is superimposed with the 97 kHz individual brightness ...

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NXP Semiconductors 7.3.6 LEDOUT0 to LEDOUT3, LED driver output state Table 10. Legend: * default value. Address 14h 15h 16h 17h LDRx = 00 — LED driver x is off (default power-up state). LDRx = 01 — LED driver x ...

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NXP Semiconductors Once subaddresses have been programmed to their right values, SUBx bits need to be set to logic 1 in order to have the device acknowledging these addresses (MODE1 register). Only the 7 MSBs representing the I register is ...

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NXP Semiconductors Remark: During power-down, slow decay of voltage supplies may keep LEDs illuminated. Consider disabling LED outputs using HIGH level applied to OE pin. 7.5 Power-on reset When power is applied to V condition until V PCA9622 registers and ...

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NXP Semiconductors 7.7 Individual brightness control with group dimming/blinking A 97 kHz ﬁxed frequency signal with programmable duty cycle (8 bits, 256 steps) is used to control individually the brightness for each LED. On top of this signal, one of ...

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NXP Semiconductors 8. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be ...

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NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 10. System conﬁguration 8.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed ...

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NXP Semiconductors 9. Bus transactions slave address START condition (1) See Table 4 for register deﬁnition. Fig 12. Write to a speciﬁc register slave address ...

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NXP Semiconductors slave address START condition R/W acknowledge from slave data from MODE2 register (cont.) A acknowledge from master data from last read byte (cont not acknowledge STOP ...

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NXP Semiconductors 10. Application design-in information V = 2 C-BUS/SMBus MASTER SDA SCL OE (1) OE requires pull-up resistor if control signal from the master is open-drain. ...

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NXP Semiconductors 10.1 Junction temperature calculation A device junction temperature can be calculated when the ambient temperature or the case temperature is known. When the ambient temperature is known, the junction temperature is calculated using Equation 4 power dissipation. T ...

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NXP Semiconductors 10.1.1 Example known R th(j-a) T amb LED output low voltage (LED V LED output current per channel = 80 mA Number of outputs = 16 I DD(max) V DD(max C-bus clock (SCL) ...

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NXP Semiconductors 1. Find P – output current (60 mA – output current (50 mA – output current (40 mA – output current (20 mA – output current (1 mA Output total power = 341.5 mW – chip core power ...

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NXP Semiconductors Table 14. Measurement amb maximum power dissipation (chip + output drivers) maximum power dissipation (output drivers only) maximum drive current per channel amb maximum power dissipation (chip + output drivers) ...

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NXP Semiconductors 13. Static characteristics Table 16. Static characteristics Symbol Parameter Supply V supply voltage DD I supply current DD I standby current stb V power-on ...

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NXP Semiconductors [2] Each bit must be limited to a maximum of 100 mA and the total package limited to 1600 mA due to internal busing limits (A) 3.0 V ...

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NXP Semiconductors 14. Dynamic characteristics Table 17. Dynamic characteristics Symbol Parameter f SCL clock frequency SCL t bus free time between BUF a STOP and START condition t hold time (repeated) HD;STA START condition t set-up time for a SU;STA ...

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NXP Semiconductors [ minimum time for SDA data out to be valid following SCL LOW. VD;DAT [3] A master device must internally provide a hold time of at least 300 ns for the SDA signal (refer to the ...

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NXP Semiconductors 15. Test information Fig 21. Test circuitry for switching times PCA9622_3 Product data sheet V I PULSE GENERATOR R = Load resistor for LEDn. R for SDA and SCL > less current). L ...

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NXP Semiconductors 16. Package outline TSSOP32: plastic thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0. pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT A 1 ...

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NXP Semiconductors HVQFN32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 0.85 mm terminal 1 index area terminal 1 32 index area DIMENSIONS (mm ...

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NXP Semiconductors 17. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described in JESD625-A or equivalent standards. 18. Soldering of SMD packages ...

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NXP Semiconductors • Process issues, such as application of adhesive and ﬂux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath speciﬁcations, including temperature and impurities ...

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NXP Semiconductors Fig 24. Temperature proﬁles for large and small components For further information on temperature proﬁles, refer to Application Note AN10365 “Surface mount reﬂow soldering description” . 19. Abbreviations Table 20. Acronym CDM DUT ESD FET HBM 2 I ...

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NXP Semiconductors 20. Revision history Table 21. Revision history Document ID Release date PCA9622_3 20090831 • Modiﬁcations: Table 1 “Ordering “SOT617-3” • Figure 3 “Pin conﬁguration for • Section 7.4 “Active LOW output enable • Figure 17 “Typical • Added ...

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NXP Semiconductors 21. Legal information 21.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualiﬁcation Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...

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NXP Semiconductors 23. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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