PCA9665D NXP [NXP Semiconductors], PCA9665D Datasheet - Page 68
PCA9665D
Manufacturer Part Number
PCA9665D
Description
Fm+ parallel bus to I2C-bus controller
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA9665D.pdf
(90 pages)
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10. Application design-in information
PCA9665_3
Product data sheet
Fig 33. Application diagram using the 80C51
80C51
V
V
DD
SS
10.1 Specific applications
10.2 Add I
ALE
The PCA9665 is a parallel bus to I
devices to interface with I
not have an integrated I
I
devices, provide a higher frequency, lower voltage migration path for the PCF8584 and
convert 8 bits of parallel data to a serial bus to avoid running multiple traces across the
printed-circuit board.
As shown in
capable I
that need to interface with I
2
C-bus port. The PCA9665 can also be used to add more I
2
C-bus port
2
address bus
C-bus port for microcontrollers, microprocessors, custom ASICs, DSPs, etc.,
DECODER
Figure
34, the PCA9665 converts 8-bits of parallel data into a multiple master
Rev. 03 — 12 August 2008
V
2
8
DD
C-bus port and the designer does not want to ‘bit-bang’ the
2
C-bus or SMBus components, where the ‘smart’ device does
2
C-bus or SMBus components.
RD
WR
INT
RESET
A1
CE
D0 to D7
A0
PCA9665
2
C-bus controller that is designed to allow ‘smart’
V
V
DD
SS
SDA
SCL
Fm+ parallel bus to I
V
DD
SLAVE
2
C-bus ports to ‘smart’
INT
002aab035
PCA9665
© NXP B.V. 2008. All rights reserved.
2
SLAVE
C-bus controller
RESET
V
DD
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