PCA9671BQ PHILIPS [NXP Semiconductors], PCA9671BQ Datasheet
PCA9671BQ
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PCA9671BQ Summary of contents
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PCA9671 Remote 16-bit I/O expander for Fm+ I Rev. 01 — 20 December 2006 1. General description The PCA9671 provides general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional bus (I (Fm+) family. The PCA9671 is ...
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... Name PCA9671D PCA9671D SO24 PCA9671DB PCA9671DB SSOP24 PCA9671DK PCA9671 SSOP24 PCA9671PW PCA9671PW TSSOP24 PCA9671BQ 9671 DHVQFN24 plastic dual in-line compatible thermal enhanced very thin quad PCA9671BS 9671 HVQFN24 [1] Also known as QSOP24. PCA9671_1 Product data sheet Remote 16-bit I/O expander for Fm+ I Description plastic small outline package ...
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NXP Semiconductors 5. Block diagram AD0 AD1 AD2 SCL SDA RESET Fig 1. Block diagram of PCA9671 data from Shift Register data to Shift Register Fig 2. Simplified schematic diagram of P00 to P17 PCA9671_1 Product ...
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NXP Semiconductors 6. Pinning information 6.1 Pinning RESET Fig 3. Pin configuration for SO24 RESET Fig 5. Pin configuration for SSOP24 PCA9671_1 Product data sheet Remote 16-bit I/O expander for Fm AD1 2 23 SDA ...
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... Rev. 01 — 20 December 2006 terminal 1 index area AD1 2 AD2 3 4 P00 5 P01 P02 6 PCA9671BQ P03 7 8 P04 P05 9 P06 10 11 P07 Transparent top view Fig 8. Pin configuration for DHVQFN24 Description HVQFN24 22 reset input (active LOW) 23 address input 1 ...
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NXP Semiconductors Table 2. Symbol AD0 SCL SDA V DD [1] HVQFN and DHVQFN package die supply ground is connected to both the V pad. The V electrical, and board-level performance, the exposed pad needs to be soldered to the ...
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NXP Semiconductors When AD2, AD1 and AD0 are held to V applied. 7.1.1 Address maps Table 3. AD2 ...
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NXP Semiconductors Table 3. AD2 SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA PCA9671_1 Product data ...
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NXP Semiconductors 7.2 Software Reset call, and device ID addresses Two other different addresses can be sent to the PCA9671. • General Call address: allows to reset the PCA9671 through the I reception of the right I information. • Device ...
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NXP Semiconductors 2 The I C-bus master must interpret a non-acknowledge from the PCA9671 (at any time ‘Software Reset Abort’. The PCA9671 does not initiate a reset of its registers. The unique sequence that initiates a Software Reset ...
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NXP Semiconductors Remark: The reading of the Device ID can be stopped anytime by sending a NACK command. Remark: If the master continues to ACK the bytes after the third byte, the PCA9671 rolls back to the first byte and ...
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NXP Semiconductors 8. I/O programming 8.1 Quasi-bidirectional I/O architecture The PCA9671’s 16 ports (see as input or output ports. Input data is transferred from the ports to the microcontroller in the Read mode (see (see Figure Every data transmission from ...
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NXP Semiconductors SCL slave address SDA START condition write to port data output from port P05 output voltage P05 pull-up ouput current P16 output voltage ...
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SCL P0x SDA DATA 00 START condition R/W acknowledge from slave read from port 0 data into port 0 DATA 00 ...
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SCL P0x SDA DATA 00 START condition R/W acknowledge from slave read from port 0 t h(D) data into port 0 ...
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NXP Semiconductors 8.4 Power-on reset When power is applied reset condition until V and the PCA9671 registers and I states. Thereafter V 8.5 RESET input A reset can be accomplished by holding the RESET pin LOW for ...
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NXP Semiconductors SDA SCL Fig 20. Definition of START and STOP conditions 9.2 System configuration A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The device that controls the message is the ‘master’ and the ...
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NXP Semiconductors Fig 22. Acknowledgement on the I 10. Application design-in information 10.1 Bidirectional I/O expander applications In the 8-bit I/O expander application shown in to P07 are outputs. When used in this configuration, during a write, the input (P00 ...
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NXP Semiconductors 10.2 High current-drive load applications The GPIO has a maximum sinking current per bit. In applications requiring additional drive, two port pins in the same octal may be connected together to sink ...
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NXP Semiconductors 12. Static characteristics Table 5. Static characteristics Symbol Parameter Supplies V supply voltage DD I supply current DD I standby current stb V power-on ...
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NXP Semiconductors 13. Dynamic characteristics Table 6. Dynamic characteristics Symbol Parameter f SCL clock frequency SCL t bus free time between a BUF STOP and START ...
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NXP Semiconductors [5] The maximum t for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA output stage t f 250 ns. This allows series protection resistors to be connected between ...
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NXP Semiconductors 14. Package outline SO24: plastic small outline package; 24 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT ...
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NXP Semiconductors SSOP24: plastic shrink small outline package; 24 leads; body width 5 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. ...
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NXP Semiconductors SSOP24: plastic shrink small outline package; 24 leads; body width 3.9 mm; lead pitch 0.635 DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) A UNIT ...
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NXP Semiconductors TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm ...
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NXP Semiconductors DHVQFN24: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 24 terminals; body 3.5 x 5.5 x 0.85 mm terminal 1 index area terminal 1 index area ...
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NXP Semiconductors HVQFN24: plastic thermal enhanced very thin quad flat package; no leads; 24 terminals; body 0.85 mm terminal 1 index area terminal 1 24 index area DIMENSIONS (mm are ...
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NXP Semiconductors 15. Handling information Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe you must take normal precautions appropriate to handling integrated circuits. 16. Soldering This text provides a very brief insight ...
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NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities ...
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NXP Semiconductors Fig 33. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 17. Abbreviations Table 9. Acronym CDM CMOS ESD GPIO HBM 2 I ...
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NXP Semiconductors 18. Revision history Table 10. Revision history Document ID Release date PCA9671_1 20061220 PCA9671_1 Product data sheet Remote 16-bit I/O expander for Fm+ I Data sheet status Change notice Product data sheet - Rev. 01 — 20 December ...
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NXP Semiconductors 19. Legal information 19.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...
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NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...