PCA9671BS NXP [NXP Semiconductors], PCA9671BS Datasheet - Page 22
![no-image](/images/no-image-200.jpg)
PCA9671BS
Manufacturer Part Number
PCA9671BS
Description
Remote 16-bit I/O expander for Fm+ I2C-bus with reset
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA9671BS.pdf
(34 pages)
- Current page: 22 of 34
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NXP Semiconductors
[5]
[6]
PCA9671_1
Product data sheet
Fig 25. I
Fig 26. Reset timing
The maximum t
250 ns. This allows series protection resistors to be connected between the SDA and the SCL pins and the SDA/SCL bus lines without
exceeding the maximum specified t
Input filters on the SDA and SCL inputs suppress noise spikes less than 50 ns.
Rise and fall times refer to V
2
C-bus timing diagram
P0n, P1n
RESET
SCL
SDA
protocol
SDA
f
SCL
for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA output stage t
50 %
t
t
SU;STA
rec(rst)
t
BUF
condition
START
(S)
t
START
HD;STA
IL
30 %
f
.
and V
t
LOW
t
r
IH
.
MSB
bit 7
(A7)
t
HIGH
Rev. 01 — 20 December 2006
t
SU;DAT
t
f
1
/f
bit 6
(A6)
SCL
Remote 16-bit I/O expander for Fm+ I
t
HD;DAT
(R/W)
bit 0
t
VD;DAT
acknowledge
t
w(rst)
50 %
(A)
ACK or read cycle
t
VD;ACK
t
t
rst
rst
50 %
condition
STOP
(P)
50 %
t
SU;STO
002aab175
output off
PCA9671
© NXP B.V. 2006. All rights reserved.
2
002aac282
C-bus with reset
f
is specified at
22 of 34
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