PCA9701HF NXP [NXP Semiconductors], PCA9701HF Datasheet
PCA9701HF
Manufacturer Part Number
PCA9701HF
Description
18 V tolerant SPI 16-bit/8-bit GPI with INT
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA9701HF.pdf
(28 pages)
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1. General description
2. Features
The PCA9701/PCA9702 are low power 18 V tolerant SPI General Purpose Input (GPI)
shift register designed to monitor the status of switch inputs. It generates an interrupt
when one or more of the switch inputs change state. The input level is recognized as a
HIGH when it is greater than 0.7
(minimum threshold of 2 V at 5 V node). The PCA9701 can monitor up to 16 switch inputs
and the PCA9702 can monitor up to 8 switch inputs.
The falling edge of the CS pin samples the input port status and clears the interrupt. When
CS is LOW, the rising edge of the SCLK loads the shift register and shifts the value out of
the shift register. The serial input is sampled on the falling edge of SCLK.
Each of the input ports has a 18 V breakdown ESD protection circuit. When used with a
series resistor (minimum 100 k ), the input can connect to a 12 V battery and support
double battery, reverse battery, 27 V jump start and 40 V load dump conditions in
automotive applications. Higher voltages can be tolerated on the inputs depending on the
series resistor used to limit the input current.
With both the high breakdown voltage and high ESD, these devices are useful for both
automotive (AEC-Q100 qualification available) and mobile applications.
The PCA9703/PCA9704 are new pin compatible devices for the PCA9701/PCA9702
which have an interrupt masking feature allowing selected inputs to not generate
interrupts and provides higher ground offset of 0.55
with minimum hysteresis of 0.05
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PCA9701; PCA9702
18 V tolerant SPI 16-bit/8-bit GPI with INT
Rev. 03 — 3 December 2008
16 general purpose input ports (PCA9701) or 8 general purpose input ports
(PCA9702)
18 V tolerant input ports with 100 k external series resistor
Input LOW threshold 0.4
Open-drain interrupt output
Interrupt enable pin (INT_EN) disables interrupt output
V
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SPI serial interface with speeds up to 5 MHz
AEC-Q100 qualification available
ESD protection exceeds 8 kV HBM per JESD22-A114, 350 V MM per AEC-Q100, and
1000 V CDM per JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
DD
DD
is very low 2.5 A maximum
range: 2.5 V to 5.5 V
V
DD
V
V
with minimum of 2 V at V
DD
DD
(minimum of 225 mV at 5 V node).
and as a LOW when it is less than 0.4
V
DD
(minimum of 2.5 V at 5 V node)
DD
= 4.5 V
Product data sheet
V
DD
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