SAF7115ET NXP [NXP Semiconductors], SAF7115ET Datasheet - Page 21

• Manufacturer Part Number: SAF7115ET
• Description: Multistandard video decoder with super-adaptive comb filter,
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
11. Test information
SAF7115_1
Product data sheet
11.2.1 Initialization of boundary scan circuit
11.1 Quality information
11.2 Boundary scan test
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q100 - Stress test qualification for integrated circuits , and is suitable for
use in automotive applications.
The SAF7115 has built-in logic and 5 dedicated pins to support boundary scan testing
which allows board testing without special hardware (nails). The SAF7115 follows the
IEEE Std. 1149.1 - Standard Test Access Port and Boundary-Scan Architecture set by the
Joint Test Action Group (JTAG).
The 5 dedicated pins are Test Mode Select (TMS), Test Clock (TCK), Test Reset
(TRST_N), Test Data Input (TDI) and Test Data Output (TDO).
The Boundary Scan Test (BST) functions BYPASS, EXTEST, SAMPLE, CLAMP and
IDCODE are all supported (see
found in specification IEEE Std. 1149.1 .
Table 10.
The Test Access Port (TAP) controller of an IC should be in the reset state
(TEST_LOGIC_RESET) when the IC is in the functional mode. The reset state also forces
the instruction register into a functional instruction such as IDCODE or BYPASS.
To compensate for the power-up reset, the standard specifies that the TAP controller will
be forced asynchronously to the TEST_LOGIC_RESET state by setting the TRST_N pin
LOW.
Instruction Description
BYPASS
EXTEST
SAMPLE
CLAMP
IDCODE
BST instructions supported by the SAF7115
this mandatory instruction provides a minimum length serial path (1-bit) between TDI
and TDO when no test operation of the component is required
this mandatory instruction allows testing of off-chip circuitry and board level
interconnections
this mandatory instruction can be used to take a sample of the inputs during normal
operation of the component; it can also be used to preload data values into the
latched outputs of the boundary scan register
this optional instruction is useful for testing when not all ICs have BST; this
instruction addresses the bypass register while the boundary scan register is in
external test mode
this optional instruction will provide information on the components manufacturer,
part number and version number
Rev. 01 — 15 October 2008
Table
10). Details about the JTAG BST-TEST can be
Multistandard video decoder
SAF7115
© NXP B.V. 2008. All rights reserved.
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