EP1C20F ALTERA [Altera Corporation], EP1C20F Datasheet - Page 98
EP1C20F
Manufacturer Part Number
EP1C20F
Description
Cyclone FPGA Family
Manufacturer
ALTERA [Altera Corporation]
Datasheet
1.EP1C20F.pdf
(106 pages)
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Cyclone Device Handbook, Volume 1
4–28
Preliminary
Tables 4–50
and row pins in Cyclone devices.
Note to
(1)
Note to
(1)
LVTTL
2.5 V
1.8 V
1.5 V
LVCMOS
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
3.3-V PCI
LVDS
LVTTL
2.5 V
1.8 V
1.5 V
LVCMOS
SSTL-3 class I
SSTL-3 class II
SSTL-2 class I
SSTL-2 class II
LVDS
Table 4–49. Cyclone Maximum Input Clock Rate for Row Pins
Table 4–50. Cyclone Maximum Output Clock Rate for Column Pins
EP1C3 devices do not support the PCI I/O standard. These parameters are only
available on row I/O pins.
EP1C3 devices do not support the PCI I/O standard.
I/O Standard
I/O Standard
Tables 4–48
Table
(1)
and
4–50:
4–51
through 4–49:
show the maximum output clock rate for column
-6 Speed
-6 Speed
Grade
Grade
464
392
387
387
405
405
414
464
473
464
567
304
220
213
166
304
100
100
134
134
320
-7 Speed
-7 Speed
Grade
Grade
428
302
311
320
374
356
365
428
432
428
549
304
220
213
166
304
100
100
134
134
320
-8 Speed
-8 Speed
Grade
Grade
Altera Corporation
387
207
252
243
333
293
302
396
396
387
531
304
220
213
166
304
100
100
134
134
275
May 2008
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
Unit