Z86E0412PSC1860 ZILOG [Zilog, Inc.], Z86E0412PSC1860 Datasheet - Page 17

• Manufacturer Part Number: Z86E0412PSC1860
• Description: Z8 CMOS OTP Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

PS009201-0301
Note:
Table 7. EPROM ARRAY READ/WRITE Mode Entry Conditions (Continued)
EPROM ARRAY READ Mode Operation
1. Perform Steps 1 through 6 of the EPROM ARRAY READ/WRITE mode entry
2. Reset the address counter by pulsing the CLEAR pin. See Figure 9 and
3. The address counter is incremented on the rising edge of the CLOCK signal.
4. After resetting the address counter using the CLEAR pin, the address counter
5. The READ operation is performed by lowering OE to V
6. A V
7. The next address is read by pulsing the clock pin High, then forcing OE to V
8. Repeat Step 7 until the final address is read.
9. Because the address is sequentially accessed, a previously-accessed
EPROM Signal
CLEAR
CLOCK
PGM
(see the EPROM ARRAY READ/WRITE Mode Entry operation, previous
page) before proceeding to Step 2.
Table 8. Please refer to
CLOCK and CLEAR signals.
points to address 0000h.
on Port2. Pins P20 to P27 represent the EPROM data D0 to D7, respectively.
See Figure 9 and Table 8.
corresponds to a 0 level stored in the EPROM array.
and bringing it back High after the data is read.
address can only be read by resetting the address counter to 0000h and
clocking the address counter to increment to the appropriate address.
OH
Please refer to
ing EPROM READ mode and data access time.
-level READ on Port2 corresponds to a 1 state, while a V
18-Pin DIP/SOIC
Pin 11
Pin 12
Pin 13
P r o g r a m m i n g S p e c i f i c a t i o n
Table 14
Table 14
for the minimum and maximum width of OE dur-
for minimum and maximum widths of the
20-Pin SSOP
Pin 12
Pin 13
Pin 14
Z8 CMOS OTP Microcontrollers
Z86E02/E04/E08/E09 SL1995
IL
and reading the data
Forced State
See Figure 8
V
V
IL
IH
OL
level
IL
12