Z86E0412PSC1860 ZILOG [Zilog, Inc.], Z86E0412PSC1860 Datasheet - Page 25

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Z86E0412PSC1860

Manufacturer Part Number
Z86E0412PSC1860
Description
Z8 CMOS OTP Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
PS009201-0301
Table 12. OPTION BIT PROGRAM AND VERIFY Mode Conditions (Continued)
OPTION BIT READ Mode Operation
1. Perform the Option Bit READ/WRITE Mode Entry operation (see
2. CLOCK is pulsed High to V
3. The 8 option bit values required in
4. The OPTION BIT READ operation is performed by lowering OE to V
5. A V
6. Please refer to
OE
EPM
V
CLEAR
CLOCK
PGM
PP
PROGRAM AND VERIFY Mode Entry
minimum and maximum width values of the CLOCK signal.
D0 to D7 correspond to Port2 pins P20 to P27. Please refer to
setup and hold times.
reading the data on Port2. Pins P20 to P27 represent the option bit data D0 to
D7, respectively. See Figure 13.
corresponds to a 0 level stored in the EPROM array.
EPROM READ mode and data access time.
OH
-level READ on Port2 corresponds to a 1 state, while a V
Table 14
Pin 8
Pin 9
Pin 10
Pin 11
Pin 12
Pin 13
P r o g r a m m i n g S p e c i f i c a t i o n
for the minimum and maximum width of OE during
IH,
then Low to V
Table 10
Pin 9
Pin 10
Pin 11
Pin 12
Pin 13
Pin 14
on page 16) before proceeding to Step 2.
IL
are read from Port2. Option bits
Z8 CMOS OTP Microcontrollers
. Please refer to
Z86E02/E04/E08/E09 SL1995
See Figure 12
V
V
See Figure 12
See Figure 12
See Figure 12
IH
IH
Table 14
Table 14
OL
OPTION BIT
-level
IL
and
for the
for
20

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