Z86E0412PSC1860 ZILOG [Zilog, Inc.], Z86E0412PSC1860 Datasheet - Page 23

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Z86E0412PSC1860

Manufacturer Part Number
Z86E0412PSC1860
Description
Z8 CMOS OTP Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
PS009201-0301
Note:
Table 11. OPTION BIT PROGRAM AND VERIFY Mode Entry Conditions (Continued)
OPTION BIT PROGRAM AND VERIFY Mode Operation
1. Perform the Option Bit READ/WRITE Mode Entry operation (see
2. The CLOCK is pulsed High to V
3. The 8 option bit values required in
4. The PROGRAM operation is performed by lowering PGM to V
5. The PROGRAM operation is complete when the PGM is raised back to V
6. The VERIFY operation is performed by lowering OE to V
7. A V
8. If the data read shows that the address location is not yet programmed, then
CE
NC
OE
EPM
V
CLEAR
CLOCK
PGM
PP
PROGRAM AND VERIFY Mode Entry
minimum and maximum widths of the CLOCK signal. See Figure 12 and
Table 12.
D0 to D7 corresponds to Port2 pins P20 to P27. Please refer to
setup and hold times.
to
Figure 12 and Table 12.
data on Port2. Pins P20 to P27 represent the Option Bit data D0 to D7,
respectively.
a V
repeat Steps 4 to 7 until the data read shows that the address location is
programmed.
Table 14
OL
OH
Please refer to
ing EPROM READ mode and data access time.
-level READ on Port2 corresponds to a 1 state (unprogrammed), while
level corresponds to a 0 level stored in the EPROM array.
for minimum and maximum widths of the PGM signal. See
Pin 7
Pin 6
Pin 8
Pin 9
Pin 10
Pin 11
Pin 12
Pin 13
P r o g r a m m i n g S p e c i f i c a t i o n
Table 14
for the minimum and maximum width of OE dur-
IH
, then Low to V
Table 10
Pin 8
Pin 7
Pin 9
Pin 10
Pin 11
Pin 12
Pin 13
Pin 14
on page 16) before proceeding to Step 2.
are forced onto Port2. Option bits
Z8 CMOS OTP Microcontrollers
Z86E02/E04/E08/E09 SL1995
IL
. Please refer to
IL
V
No Connection
See Figure 11
See Figure 11
See Figure 11
See Figure 11
See Figure 11
V
, then reading the
IL
IH
IL
. Please refer
OPTION BIT
Table 14
Table 14
for
IH
for
.
18

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