MPC8347 FREESCALE [Freescale Semiconductor, Inc], MPC8347 Datasheet - Page 85

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MPC8347

Manufacturer Part Number
MPC8347
Description
Integrated Host Processor Hardware Specifications
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Table 58
conditions.
Freescale Semiconductor
e300 core frequency (core_clk)
Coherent system bus frequency (csb_clk)
DDR memory bus frequency (MCLK)
Local bus frequency (LCLKn)
PCI input frequency (CLKIN or PCI_CLK)
Security core maximum internal operating frequency
USB_DR, USB_MPH maximum internal operating
frequency
e300 core frequency (core_clk)
Coherent system bus frequency
(csb_clk)
DDR and DDR2 memory bus frequency
(MCLK)
Local bus frequency
(LCLKn)
PCI input frequency (CLKIN or PCI_CLK)
Security core maximum internal operating frequency
USB_DR, USB_MPH maximum internal operating frequency
LCLK[0:2], and core_clk frequencies do not exceed their respective maximum or minimum operating frequencies. The value
of SCCR[ENCCM], SCCR[USBDRCM]and SCCR[USBMPHCM] must be programmed so that the maximum internal operating
frequency of the Security core and USB modules does not exceed the respective values listed in this table.
the csb_clk frequency (depending on RCWL[LBIUCM]).
LCLK[0:2], and core_clk frequencies do not exceed their respective maximum or minimum operating frequencies. The value
of SCCR[ENCCM], SCCR[USBDRCM]and SCCR[USBMPHCM] must be programmed so that the maximum internal operating
frequency of the Security core and USB modules does not exceed the respective values listed in this table.
the csb_clk frequency (depending on RCWL[LBIUCM]).
The CLKIN frequency, RCWL[SPMF], and RCWL[COREPLL] settings must be chosen so that the resulting csb_clk, MCLK,
The DDR data rate is 2x the DDR memory bus frequency.
The local bus frequency is 1/2, 1/4, or 1/8 of the lbiu_clk frequency (depending on LCCR[CLKDIV]) which is in turn 1x or 2x
The CLKIN frequency, RCWL[SPMF], and RCWL[COREPLL] settings must be chosen so that the resulting csb_clk, MCLK,
The DDR data rate is 2x the DDR memory bus frequency.
The local bus frequency is 1/2, 1/4, or 1/8 of the lbiu_clk frequency (depending on LCCR[CLKDIV]) which is in turn 1x or 2x
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3
provides the operating frequencies for the MPC8347EA PBGA under recommended operating
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 3
Characteristic
Characteristic
3
1
Table 58. Operating Frequencies for PBGA
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Table 57. Operating Frequencies for TBGA
1
266 MHz
200–266
16.67–133
533 MHz
266–533
100–266
100–200
25–66
133
133
16.67–133
333 MHz
200–333
100–266
100–133
25–66
133
133
16.67–133
667 MHz
266–667
100–333
100–200
25–66
166
166
400 MHz
200–400
MHz
MHz
MHz
MHz
Unit
MHz
MHz
MHz
Clocking
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
85

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