MPC8347 FREESCALE [Freescale Semiconductor, Inc], MPC8347 Datasheet - Page 88
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MPC8347
Manufacturer Part Number
MPC8347
Description
Integrated Host Processor Hardware Specifications
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MPC8347.pdf
(108 pages)
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Clocking
19.2
RCWL[COREPLL] selects the ratio between the internal coherent system bus clock (csb_clk) and the e300
core clock (core_clk).
not listed in
88
1
2
Core PLL Configuration
CFG_CLKIN_DIV
CFG_CLKIN_DIV doubles csb_clk if set high.
CLKIN is the input clock in host mode; PCI_CLK is the input clock in agent mode.
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 3
Table 62
at reset
High
High
High
High
High
High
high
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
1
should be considered as reserved.
Table 62
Table 61. CSB Frequency Options for Agent Mode
shows the encodings for RCWL[COREPLL]. COREPLL values that are
SPMF
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000
0010
0011
0100
0101
0110
0111
1000
Input Clock
csb_clk :
Ratio
10 : 1
11 : 1
12 : 1
13 : 1
14 : 1
15 : 1
16 : 1
10 : 1
12 : 1
14 : 1
16 : 1
2 : 1
3 : 1
4 : 1
5 : 1
6 : 1
7 : 1
8 : 1
9 : 1
4 : 1
6 : 1
8 : 1
2
16.67
100
116
133
150
166
183
200
216
233
250
266
100
133
166
200
233
266
Input Clock Frequency (MHz)
csb_clk Frequency (MHz)
100
125
150
175
200
225
250
275
300
325
100
150
200
250
300
25
33.33
100
133
166
200
233
266
300
333
133
200
266
333
Freescale Semiconductor
66.67
2
133
200
266
333
266