CY8C32_12 CYPRESS [Cypress Semiconductor], CY8C32_12 Datasheet - Page 24

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CY8C32_12

Manufacturer Part Number
CY8C32_12
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
5.6 External Memory Interface
CY8C32 provides an external memory interface (EMIF) for
connecting to external memory devices. The connection allows
read and write accesses to external memories. The EMIF
operates in conjunction with UDBs, I/O ports, and other
hardware to generate external memory address and control
signals. At 33 MHz, each memory access cycle takes four bus
clock cycles.
5.7 Memory Map
The CY8C32 8051 memory map is very similar to the MCS-51
memory map.
5.7.1 Code Space
The CY8C32 8051 code space is 64 KB. Only main flash exists
in this space. See the
page 22.
Document Number: 001-56955 Rev. *N
“Flash Program Memory”
PHUB
Data,
Data,
Data,
Address,
Signals
Address,
and Control
Signals
Address,
Signals
and Control
and Control
I/O IF
section on
Figure 5-1. EMIF Block Diagram
EM Control
Signals
EMIF
UDB
Data Signals
Address Signals
Control Signals
Signals
Other
Control
Figure 5-1
synchronous and asynchronous memories. The CY8C32
supports only one type of external memory device at a time.
External memory can be accessed via the 8051 xdata space; up
to 24 address bits can be used. See
page 26. The memory can be 8 or 16 bits wide.
5.7.2 Internal Data Space
The CY8C32 8051 internal data space is 384 bytes, compressed
within a 256-byte space. This space consists of 256 bytes of
RAM (in addition to the SRAM mentioned in
22) and a 128-byte space for Special Function Registers (SFRs).
See
registers R0-R7. The next 16 bytes are bit-addressable.
Figure
DSI to Port
Control
DSI Dynamic Output
is the EMIF block diagram. The EMIF supports
PORTs
PORTs
PORTs
5-2. The lowest 32 bytes are used for 4 banks of
I/O
I/O
I/O
External _ MEM_ ADDR[23:0]
External _ MEM_ DATA[15:0]
PSoC
®
Control
3: CY8C32 Family
“xdata Space”
Static RAM
Data Sheet
Page 24 of 122
section on
on page

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