PIC18F2450 MICROCHIP [Microchip Technology], PIC18F2450 Datasheet - Page 256
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PIC18F2450
Manufacturer Part Number
PIC18F2450
Description
28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F2450.pdf
(320 pages)
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PIC18F2450/4450
19.2.2
ADDFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39760A-page 254
Q Cycle Activity:
Note:
Before Instruction
After Instruction
Decode
FSR2
FSR2
Q1
EXTENDED INSTRUCTION SET
All PIC18 instructions may take an optional label argument preceding the instruction mnemonic for use in
symbolic addressing. If a label is used, the instruction syntax then becomes: {label} instruction argument(s).
=
=
literal ‘k’
ADDFSR
Add Literal to FSR
0
f
FSR(f) + k
None
The 6-bit literal ‘k’ is added to the
contents of the FSR specified by ‘f’.
1
1
ADDFSR f, k
Read
1110
Q2
03FFh
0422h
[ 0, 1, 2 ]
k
63
2, 23h
1000
Process
FSR(f)
Data
Q3
ffkk
Advance Information
Write to
FSR
kkkk
Q4
ADDULNK
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Operation
Decode
No
FSR2
PC
FSR2
PC
Q1
=
=
=
=
Operation
literal ‘k’
ADDULNK 23h
Add Literal to FSR2 and Return
ADDULNK k
0
FSR2 + k
(TOS)
None
The 6-bit literal ‘k’ is added to the
contents of FSR2. A RETURN is then
executed by loading the PC with the
TOS.
The instruction takes two cycles to
execute; a NOP is performed during
the second cycle.
This may be thought of as a special
case of the ADDFSR instruction,
where f = 3 (binary ‘11’); it operates
only on FSR2.
1
2
Read
1110
No
Q2
03FFh
0100h
0422h
(TOS)
k
© 2006 Microchip Technology Inc.
63
PC
1000
Operation
Process
FSR2,
Data
No
Q3
11kk
Operation
Write to
FSR
No
kkkk
Q4
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